Logic simulation (English Wikipedia)

Analysis of information sources in references of the Wikipedia article "Logic simulation" in English language version.

refsWebsite

Global rank English rank

2books.google.com

3^rd place

3^rd place

2researchgate.net

120^th place

125^th place

652^nd place

515^th place

833^rd place

567^th place

books.google.com

Laung-Terng Wang; Yao-Wen Chang; Kwang-Ting (Tim) Cheng (11 March 2009). Electronic Design Automation: Synthesis, Verification, and Test. Morgan Kaufmann. ISBN 978-0-08-092200-3.
V. Litovski; Mark Zwolinski (31 December 1996). VLSI Circuit Simulation and Optimization. Springer Science & Business Media. ISBN 978-0-412-63860-2.

dtic.mil

apps.dtic.mil

"Network Modeling and Simulation Environment" (PDF). Defense Technical Information Center. Retrieved January 1, 2023.

ieee.org

ieeexplore.ieee.org

Wang, Tsu-Hua and Tan, Chong Guan (1995). Practical code coverage for Verilog. 1995 IEEE International Verilog HDL Conference. IEEE. pp. 99–104.{{cite conference}}: CS1 maint: multiple names: authors list (link)

researchgate.net

Bombieri, Nicola; Fummi, Franco; Pravadelli, Graziano (May 2006). Hardware Design and Simulation for Verification. Lecture Notes in Computer Science. pp. 1–29.
Jou, Jing-Yang and Liu, Chien-Nan Jimmy (1999). Coverage analysis techniques for HDL design validation. Asia Pacific CHip Design Languages. pp. 48–55.{{cite conference}}: CS1 maint: multiple names: authors list (link)