14 nm process (English Wikipedia)

Shvets, Anthony (September 7, 2014). "Intel launches first Broadwell processors". CPU World. Retrieved March 18, 2015.
"Intel Core i7-5557U specifications". CPU World. 2015. Retrieved March 18, 2015.

design-reuse.com

Shukla, Priyank. "A Brief History of Process Node Evolution". design-reuse.com. Retrieved July 9, 2019.

digitimes.com

"Intel postpones Broadwell availability to 4Q14". Digitimes.com. February 12, 2014. Retrieved February 13, 2014.

doi.org

Richard, O.; et al. (2007). "Sidewall damage in silica-based low-k material induced by different patterning plasma processes studied by energy filtered and analytical scanning TEM". Microelectronic Engineering. 84 (3): 517–523. doi:10.1016/j.mee.2006.10.058.
Gross, T.; et al. (2008). "Detection of nanoscale etch and ash damage to nanoporous methyl silsesquioxane using electrostatic force microscopy". Microelectronic Engineering. 85 (2): 401–407. doi:10.1016/j.mee.2007.07.014.
Axelrad, V.; et al. (2010). Rieger, Michael L; Thiele, Joerg (eds.). "16nm with 193nm immersion lithography and double exposure". Proc. SPIE. Design for Manufacturability through Design-Process Integration IV. 7641: 764109. Bibcode:2010SPIE.7641E..09A. doi:10.1117/12.846677. S2CID 56158128.
Noh, M-S.; et al. (2010). Dusa, Mircea V; Conley, Will (eds.). "Implementing and validating double patterning in 22-nm to 16-nm product design and patterning flows". Proc. SPIE. Optical Microlithography XXIII. 7640: 76400S. Bibcode:2010SPIE.7640E..0SN. doi:10.1117/12.848194. S2CID 120545900.
Ahmed, Shibly; Bell, Scott; Tabery, Cyrus; Bokor, Jeffrey; Kyser, David; Hu, Chenming; Liu, Tsu-Jae King; Yu, Bin; Chang, Leland (December 2002). "FinFET scaling to 10 nm gate length" (PDF). Digest. International Electron Devices Meeting. pp. 251–254. doi:10.1109/IEDM.2002.1175825. ISBN 0-7803-7462-2. S2CID 7106946. Archived from the original (PDF) on May 27, 2020. Retrieved December 10, 2019.
Kaneko, A; Yagashita, A; Yahashi, K; Kubota, T; et al. (2005). "Sidewall transfer process and selective gate sidewall spacer formation technology for sub-15nm FinFET with elevated source/drain extension". IEEE International Electron Devices Meeting (IEDM 2005). pp. 844–847. doi:10.1109/IEDM.2005.1609488.
Hübler, Arved; et al. (2011). "Printed Paper Photovoltaic Cells". Advanced Energy Materials. 1 (6): 1018–1022. Bibcode:2011AdEnM...1.1018H. doi:10.1002/aenm.201100394. S2CID 98247321.

eejournal.com

"No More Nanometers – EEJournal". July 23, 2020.
"Life at 10nm. (Or is it 7nm?) And 3nm - Views on Advanced Silicon Platforms". eejournal.com. March 12, 2018.

eetimes.com

"Mentor moves tools toward 16-nanometer". EETimes. August 23, 2010.
"Intel to build fab for 14-nm chips". EE Times. Archived from the original on February 2, 2013. Retrieved February 22, 2011.
Update: Intel to build fab for 14-nm chips

electronics-eetimes.com

"Samsung's 14 nm LPE FinFET transistors". Electronics EETimes. January 20, 2016. Retrieved February 17, 2017.

engadget.com

"Samsung reveals its first 14nm FinFET test chip". Engadget. December 21, 2012.

everymac.com

"Apple MacBook Pro "Core i7" 3.1 13" Early 2015 Specs". EveryMac.com. 2015. Retrieved March 18, 2015.

extremetech.com

Hruska, Joel. "14nm, 7nm, 5nm: How low can CMOS go? It depends if you ask the engineers or the economists..." ExtremeTech.
"Intel Faces 14nm Shortage As CPU Prices Rise - ExtremeTech". www.extremetech.com.
"GlobalFoundries announces 14nm validation with AMD Zen silicon". ExtremeTech.

globalfoundries.com

"PB14LPP-1.0" (PDF). GlobalFoundries. Archived from the original (PDF) on September 5, 2017. Retrieved November 28, 2022.
"PB12LP-1.1" (PDF). GlobalFoundries. Archived from the original (PDF) on December 27, 2018. Retrieved November 28, 2022.

harvard.edu

ui.adsabs.harvard.edu

Axelrad, V.; et al. (2010). Rieger, Michael L; Thiele, Joerg (eds.). "16nm with 193nm immersion lithography and double exposure". Proc. SPIE. Design for Manufacturability through Design-Process Integration IV. 7641: 764109. Bibcode:2010SPIE.7641E..09A. doi:10.1117/12.846677. S2CID 56158128.
Noh, M-S.; et al. (2010). Dusa, Mircea V; Conley, Will (eds.). "Implementing and validating double patterning in 22-nm to 16-nm product design and patterning flows". Proc. SPIE. Optical Microlithography XXIII. 7640: 76400S. Bibcode:2010SPIE.7640E..0SN. doi:10.1117/12.848194. S2CID 120545900.
Hübler, Arved; et al. (2011). "Printed Paper Photovoltaic Cells". Advanced Energy Materials. 1 (6): 1018–1022. Bibcode:2011AdEnM...1.1018H. doi:10.1002/aenm.201100394. S2CID 98247321.

hpcwire.com

"GLOBALFOUNDRIES 12LP+ FinFET Solution Ready for Production". HPCwire. Retrieved August 1, 2024.

ibm.com

www-03.ibm.com

"IBM and ARM to Collaborate on Advanced Semiconductor Technology for Mobile Electronics". IBM Press release. January 17, 2011. Archived from the original on January 21, 2011.

ieee.org

spectrum.ieee.org

"Intel Now Packs 100 Million Transistors in Each Square Millimeter". IEEE Spectrum: Technology, Engineering, and Science News. March 30, 2017. Retrieved November 14, 2018.

intel.com

newsroom.intel.com

"Intel Discloses Newest Microarchitecture and 14 Nanometer Manufacturing Process Technical Details". Intel. August 11, 2014.
Bohr, Mark (March 28, 2017). "Let's Clear Up the Node Naming Mess". Intel Newsroom. Retrieved December 6, 2018.

intel.com

"Intel 14nm Process Technology" (PDF).

nec.com

"NEC releases new high-end HPC product line, SX-Aurora TSUBASA". NEC. Retrieved March 21, 2018.

reuters.com

"Intel shelves cutting-edge Arizona chip factory". Reuters. January 14, 2014.

samsung.com

news.samsung.com

"Samsung Announces Mass Production of Industry's First 14nm FinFET Mobile Application Processor". news.samsung.com.

semanticscholar.org

api.semanticscholar.org

Axelrad, V.; et al. (2010). Rieger, Michael L; Thiele, Joerg (eds.). "16nm with 193nm immersion lithography and double exposure". Proc. SPIE. Design for Manufacturability through Design-Process Integration IV. 7641: 764109. Bibcode:2010SPIE.7641E..09A. doi:10.1117/12.846677. S2CID 56158128.
Noh, M-S.; et al. (2010). Dusa, Mircea V; Conley, Will (eds.). "Implementing and validating double patterning in 22-nm to 16-nm product design and patterning flows". Proc. SPIE. Optical Microlithography XXIII. 7640: 76400S. Bibcode:2010SPIE.7640E..0SN. doi:10.1117/12.848194. S2CID 120545900.
Ahmed, Shibly; Bell, Scott; Tabery, Cyrus; Bokor, Jeffrey; Kyser, David; Hu, Chenming; Liu, Tsu-Jae King; Yu, Bin; Chang, Leland (December 2002). "FinFET scaling to 10 nm gate length" (PDF). Digest. International Electron Devices Meeting. pp. 251–254. doi:10.1109/IEDM.2002.1175825. ISBN 0-7803-7462-2. S2CID 7106946. Archived from the original (PDF) on May 27, 2020. Retrieved December 10, 2019.
Hübler, Arved; et al. (2011). "Printed Paper Photovoltaic Cells". Advanced Energy Materials. 1 (6): 1018–1022. Bibcode:2011AdEnM...1.1018H. doi:10.1002/aenm.201100394. S2CID 98247321.

semiconductors.org

"International Technology Roadmap for Semiconductors 2.0 2015 Edition Executive Report" (PDF). Archived from the original (PDF) on October 2, 2016. Retrieved April 6, 2017.

skhynix.com

"History: 2010s". SK Hynix. Archived from the original on May 17, 2021. Retrieved July 8, 2019.

smics.com

"SMIC-14nm". SIMC.

taiwantoday.tw

"16nm SRAM produced – Taiwan Today". taiwantoday.tw. Archived from the original on March 20, 2016. Retrieved December 16, 2009.

techcenturion.com

"7nm vs 10nm vs 14nm: Fabrication Process - Tech Centurion". November 26, 2019.

techpowerup.com

"Talks of foundry partnership between NVIDIA and Samsung (14nm) didn't succeed, and the GPU maker decided to revert to TSMC's 16nm process". Retrieved August 25, 2015.
"Samsung to Optical-Shrink NVIDIA "Pascal" to 14 nm". Retrieved August 13, 2016.

theregister.co.uk

"Intel reveals 14nm PC, declares Moore's Law 'alive and well'". The Register. September 10, 2013.

theverge.com

Vincent, James (September 9, 2015). "Apple's new A9 and A9X processors promise 'desktop-class performance'". The Verge. Retrieved August 27, 2017.

tomshardware.co.uk

"Samsung Mass Producing 128Gb 3-bit MLC NAND Flash". Tom's Hardware. April 11, 2013. Archived from the original on June 21, 2019. Retrieved June 21, 2019.

tsmc.com

"16/12nm Technology". TSMC. Retrieved June 30, 2019.
"16/12nm Technology". TSMC. Retrieved November 12, 2022.

wccftech.com

"Exclusive: Is Intel Really Starting To Lose Its Process Lead? 7nm Node Slated For Release in 2022". wccftech.com. September 10, 2016.
"NVIDIA GeForce RTX 30 Series & Ampere GPUs Further Detailed - GA102/GA104 GPU Specs & RTX 3090, RTX 3080, RTX 3070 Performance & Features Revealed". September 4, 2020.

web.archive.org

"IBM and ARM to Collaborate on Advanced Semiconductor Technology for Mobile Electronics". IBM Press release. January 17, 2011. Archived from the original on January 21, 2011.
"Intel to build fab for 14-nm chips". EE Times. Archived from the original on February 2, 2013. Retrieved February 22, 2011.
Ahmed, Shibly; Bell, Scott; Tabery, Cyrus; Bokor, Jeffrey; Kyser, David; Hu, Chenming; Liu, Tsu-Jae King; Yu, Bin; Chang, Leland (December 2002). "FinFET scaling to 10 nm gate length" (PDF). Digest. International Electron Devices Meeting. pp. 251–254. doi:10.1109/IEDM.2002.1175825. ISBN 0-7803-7462-2. S2CID 7106946. Archived from the original (PDF) on May 27, 2020. Retrieved December 10, 2019.
"15 Nanometre Memory Tested". The Inquirer. Archived from the original on December 13, 2007.{{cite web}}: CS1 maint: unfit URL (link)
"16nm SRAM produced – Taiwan Today". taiwantoday.tw. Archived from the original on March 20, 2016. Retrieved December 16, 2009.
"History: 2010s". SK Hynix. Archived from the original on May 17, 2021. Retrieved July 8, 2019.
"Samsung Mass Producing 128Gb 3-bit MLC NAND Flash". Tom's Hardware. April 11, 2013. Archived from the original on June 21, 2019. Retrieved June 21, 2019.
"PB14LPP-1.0" (PDF). GlobalFoundries. Archived from the original (PDF) on September 5, 2017. Retrieved November 28, 2022.
"PB12LP-1.1" (PDF). GlobalFoundries. Archived from the original (PDF) on December 27, 2018. Retrieved November 28, 2022.
"International Technology Roadmap for Semiconductors 2.0 2015 Edition Executive Report" (PDF). Archived from the original (PDF) on October 2, 2016. Retrieved April 6, 2017.
Shilov, Anton. "SMIC Begins Volume Production of 14 nm FinFET Chips: China's First FinFET Line". AnandTech. Archived from the original on November 15, 2019. Retrieved November 16, 2019.

wikichip.org

fuse.wikichip.org

Schor, David (July 22, 2018). "VLSI 2018: GlobalFoundries 12nm Leading-Performance, 12LP". WikiChip Fuse. Retrieved May 31, 2019.
Schor, David (July 22, 2018). "VLSI 2018: GlobalFoundries 12nm Leading-Performance, 12LP". WikiChip Fuse.
Schor, David (April 16, 2019). "TSMC Announces 6-Nanometer Process". WikiChip Fuse. Retrieved May 31, 2019.

en.wikichip.org

"14 nm lithography process - WikiChip". en.wikichip.org. Retrieved February 17, 2017.
"16 nm lithography process - WikiChip". en.wikichip.org. Retrieved February 17, 2017.

wsu.edu

eecs.wsu.edu

Ahmed, Shibly; Bell, Scott; Tabery, Cyrus; Bokor, Jeffrey; Kyser, David; Hu, Chenming; Liu, Tsu-Jae King; Yu, Bin; Chang, Leland (December 2002). "FinFET scaling to 10 nm gate length" (PDF). Digest. International Electron Devices Meeting. pp. 251–254. doi:10.1109/IEDM.2002.1175825. ISBN 0-7803-7462-2. S2CID 7106946. Archived from the original (PDF) on May 27, 2020. Retrieved December 10, 2019.

zdnet.com

"Intel scientists find wall for Moore's Law". ZDNet. December 1, 2003.