Don't-care term (English Wikipedia)

Analysis of information sources in references of the Wikipedia article "Don't-care term" in English language version.

refsWebsite

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11web.archive.org

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8books.google.com

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7doi.org

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5loc.gov

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4semanticscholar.org

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3archive.org

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2worldradiohistory.com

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2worldcat.org

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2intel.com

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2springer.com

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1philectrosophy.com

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1ams.org

451^st place

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1jstor.org

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1wikidata.org

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1researchgate.net

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1nii.ac.jp

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1,952^nd place

1semicon-storage.com

low place

ams.org

mathscinet.ams.org

Phister, Jr., Montgomery (April 1959) [December 1958]. Logical design of digital computers. Digital Design and Applications (3rd printing, 1st ed.). New York, USA: John Wiley & Sons Inc. p. 97. ISBN 0-47168805-3. LCCN 58-6082. MR 0093930. ISBN 978-0-47168805-1. p. 97: […] These prohibited combinations will here be called redundancies (they have also been called irrelevancies, "don't cares," and forbidden combinations), and they can usually be used to simplify Boolean functions. […] (xvi+408 pages)

archive.org

Keister, William; Ritchie, Alistair E.; Washburn, Seth H. (1951). The Design Of Switching Circuits. The Bell Telephone Laboratories Series (1 ed.). D. Van Nostrand Company, Inc. p. 147. Archived from the original on 2020-05-09. Retrieved 2020-05-09. [1] (2+xx+556+2 pages)
Aiken, Howard H.; Blaauw, Gerrit; Burkhart, William; Burns, Robert J.; Cali, Lloyd; Canepa, Michele; Ciampa, Carmela M.; Coolidge, Jr., Charles A.; Fucarile, Joseph R.; Gadd, Jr., J. Orten; Gucker, Frank F.; Harr, John A.; Hawkins, Robert L.; Hayes, Miles V.; Hofheimer, Richard; Hulme, William F.; Jennings, Betty L.; Johnson, Stanley A.; Kalin, Theodore; Kincaid, Marshall; Lucchini, E. Edward; Minty, William; Moore, Benjamin L.; Remmes, Joseph; Rinn, Robert J.; Roche, John W.; Sanbord, Jacquelin; Semon, Warren L.; Singer, Theodore; Smith, Dexter; Smith, Leonard; Strong, Peter F.; Thomas, Helene V.; Wang, An; Whitehouse, Martha L.; Wilkins, Holly B.; Wilkins, Robert E.; Woo, Way Dong; Little, Elbert P.; McDowell, M. Scudder (1952) [January 1951]. Synthesis of electronic computing and control circuits. The Annals of the Computation Laboratory of Harvard University. Vol. XXVII (second printing, revised ed.). Write-Patterson Air Force Base: Harvard University Press (Cambridge, Massachusetts, USA) / Geoffrey Cumberlege Oxford University Press (London). ark:/13960/t4zh1t09d. Retrieved 2017-04-16. (2+x+278+2 pages) (NB. Work commenced in April 1948.)
Lind, Larry Frederick; Nelson, John Christopher Cunliffe (1977-04-01). "2.3.7. Don't cares". Analysis and Design of Sequential Digital Systems. Electrical and Electronic Engineering (1 ed.). London & Basingstoke, UK: The Macmillan Press Ltd. pp. 20, 121–122. doi:10.1007/978-1-349-15757-0. ISBN 0-333-19266-4. Archived from the original on 2020-04-30. Retrieved 2020-04-30. (4+viii+146+6 pages)

books.google.com

Morris, Noel Malcolm (January 1969) [1968-12-16]. "Code and Code Converters - Part 2: Mapping techniques and code converters" (PDF). Wireless World. 75 (1399). Iliffe Technical Publications Ltd.: 34–37. Archived (PDF) from the original on 2021-03-09. Retrieved 2020-05-09. [14]
Morris, Noel Malcolm (1969). Logic Circuits. European electrical and electronic engineering series (1 ed.). London, UK: McGraw-Hill. pp. 31, 96, 114. ISBN 0-07094106-8. LCCN 72458600. ISBN 978-0-07094106-9. NCID BA12104142. Retrieved 2021-03-28. p. 31: […] sometimes known as a can't happen condition […] (x+189 pages)
Association Internationale pour le Calcul Analogique (AICA), ed. (1970) [1969-09-15]. "unknown". Colloque international / International Symposium. Systèmes logiques: Conception et applications / Design and Applications of Logical Systems. Actes / Proceedings. Bruxelles, 15–20 septembre 1969 / Brussels, September 15–20, 1969. (in English and French). Part 2. Bruxelles, Belgium: Presses Académiques Européennes: 1253. Retrieved 2021-03-28. {{cite journal}}: Cite uses generic title (help) (xxxiii+650+676 pages)
Holdsworth, Brian; Woods, Clive (2002). Digital Logic Design (4 ed.). Newnes Books / Elsevier Science. pp. 55–56, 251. ISBN 0-7506-4588-2. ISBN 978-0-08047730-5. Retrieved 2020-04-19.{{cite book}}: CS1 maint: ignored ISBN errors (link) (519 pages) [15]
Strong, John A., ed. (2013-03-12) [1991]. "Chapter 2.11 Hazards and Glitches". Basic Digital Electronics. Physics and Its Applications. Vol. 2 (reprint of 1st ed.). Chapman & Hall / Springer Science & Business Media, B.V. pp. 28–29. ISBN 978-9-40113118-6. LCCN 90-2689. Retrieved 2020-03-30. (220 pages)
Iman, Sasan; Pedram, Massoud (1998) [1997-11-30]. "Chapter 6. Logic Minimization for Low Power". Written at University of Southern California, California, USA. Logic Synthesis for Low Power VLSI Designs (1 ed.). Boston, Massachusetts, USA / New York, USA: Kluwer Academic Publishers / Springer Science+Business Media, LLC. pp. 109–148 [110]. doi:10.1007/978-1-4615-5453-0_6. ISBN 978-0-7923-8076-4. LCCN 97-042097. Archived from the original on 2024-07-26. Retrieved 2024-07-26. (xv+236 pages) [16]
Naylor, David; Jones, Simon (May 1997). VHDL: A Logic Synthesis Approach (reprint of 1st ed.). Chapman & Hall / Cambridge University Press / Springer Science & Business Media. pp. 14–15, 219, 221. ISBN 0-412-61650-5. Retrieved 2020-03-30. (x+327 pages)
Lind, Larry Frederick; Nelson, John Christopher Cunliffe (1977-04-01). "2.3.7. Don't cares". Analysis and Design of Sequential Digital Systems. Electrical and Electronic Engineering (1 ed.). London & Basingstoke, UK: The Macmillan Press Ltd. pp. 20, 121–122. doi:10.1007/978-1-349-15757-0. ISBN 0-333-19266-4. Archived from the original on 2020-04-30. Retrieved 2020-04-30. (4+viii+146+6 pages)

doi.org

Karnaugh, Maurice (November 1953) [1953-04-23, 1953-03-17]. "The Map Method for Synthesis of Combinational Logic Circuits" (PDF). Transactions of the American Institute of Electrical Engineers, Part I: Communication and Electronics. 72 (5): 593–599. doi:10.1109/TCE.1953.6371932. S2CID 51636736. Paper 53-217. Archived from the original (PDF) on 2017-04-16. Retrieved 2017-04-16. (7 pages)
Moore, Edward Forrest (December 1958). "Samuel H. Caldwell. Switching circuits and logical design. John Wiley & Sons, Inc., New York 1958, and Chapman & Hall Limited, London 1958, xvii + 686 pp". The Journal of Symbolic Logic (Review). 23 (4): 433–434. doi:10.2307/2964020. JSTOR 2964020. S2CID 57495605. p. 433: […] what Caldwell calls "optional entries" […] other authors have called "invalid combinations", "don't cares", "vacuous combinations" […] (2 pages)
Iman, Sasan; Pedram, Massoud (1998) [1997-11-30]. "Chapter 6. Logic Minimization for Low Power". Written at University of Southern California, California, USA. Logic Synthesis for Low Power VLSI Designs (1 ed.). Boston, Massachusetts, USA / New York, USA: Kluwer Academic Publishers / Springer Science+Business Media, LLC. pp. 109–148 [110]. doi:10.1007/978-1-4615-5453-0_6. ISBN 978-0-7923-8076-4. LCCN 97-042097. Archived from the original on 2024-07-26. Retrieved 2024-07-26. (xv+236 pages) [16]
Maiti, Tapas Kr.; Chattopadhyay, Santanu (2008-05-18). Don't care filling for power minimization in VLSI circuit testing. 2008 IEEE International Symposium on Circuits and Systems (ISCAS) (1 ed.). Seattle, Washington, USA: Institute of Electrical and Electronics Engineers. pp. 2637–2640. doi:10.1109/ISCAS.2008.4541998. eISSN 2158-1525. ISBN 978-1-4244-1683-7. ISSN 0271-4302.
Ginsburg, Seymour (1959-04-01). "On the Reduction of Superfluous States in a Sequential Machine". Journal of the ACM. 6 (2): 259–282. doi:10.1145/320964.320983. S2CID 10118067.
Lind, Larry Frederick; Nelson, John Christopher Cunliffe (1977-04-01). "2.3.7. Don't cares". Analysis and Design of Sequential Digital Systems. Electrical and Electronic Engineering (1 ed.). London & Basingstoke, UK: The Macmillan Press Ltd. pp. 20, 121–122. doi:10.1007/978-1-349-15757-0. ISBN 0-333-19266-4. Archived from the original on 2020-04-30. Retrieved 2020-04-30. (4+viii+146+6 pages)
Kumar, Ramayya; Kropf, Thomas, eds. (1995). "Theorem Provers in Circuit Design". Proceedings of the Second International Conference, TPCD '94, Bad Herrenalb, Germany, September 26–28, 1994. Lecture Notes in Computer Science. Vol. 901 (1st ed.). Springer-Verlag Berlin Heidelberg. p. 136. doi:10.1007/3-540-59047-1. ISBN 978-3-540-59047-7. ISSN 0302-9743. S2CID 42116934. Retrieved 2020-03-30. (viii+312 pages)

intel.com

"Power-Up Don't Care logic option". Quartus Help. Intel Corporation. 2017. Archived from the original on 2020-04-19. Retrieved 2020-04-19.
"Power-up level of register <name> is not specified – using unspecifed power-up level". Knowledge Base. Intel Corporation. 2020. Archived from the original on 2020-04-19. Retrieved 2020-04-19.

jstor.org

Moore, Edward Forrest (December 1958). "Samuel H. Caldwell. Switching circuits and logical design. John Wiley & Sons, Inc., New York 1958, and Chapman & Hall Limited, London 1958, xvii + 686 pp". The Journal of Symbolic Logic (Review). 23 (4): 433–434. doi:10.2307/2964020. JSTOR 2964020. S2CID 57495605. p. 433: […] what Caldwell calls "optional entries" […] other authors have called "invalid combinations", "don't cares", "vacuous combinations" […] (2 pages)

loc.gov

lccn.loc.gov

Phister, Jr., Montgomery (April 1959) [December 1958]. Logical design of digital computers. Digital Design and Applications (3rd printing, 1st ed.). New York, USA: John Wiley & Sons Inc. p. 97. ISBN 0-47168805-3. LCCN 58-6082. MR 0093930. ISBN 978-0-47168805-1. p. 97: […] These prohibited combinations will here be called redundancies (they have also been called irrelevancies, "don't cares," and forbidden combinations), and they can usually be used to simplify Boolean functions. […] (xvi+408 pages)
Caldwell, Samuel Hawks (1958-12-01) [February 1958]. Written at Watertown, Massachusetts, USA. Switching Circuits and Logical Design. 5th printing September 1963 (1st ed.). New York, USA: John Wiley & Sons Inc. ISBN 0-47112969-0. LCCN 58-7896. (xviii+686 pages)
Morris, Noel Malcolm (1969). Logic Circuits. European electrical and electronic engineering series (1 ed.). London, UK: McGraw-Hill. pp. 31, 96, 114. ISBN 0-07094106-8. LCCN 72458600. ISBN 978-0-07094106-9. NCID BA12104142. Retrieved 2021-03-28. p. 31: […] sometimes known as a can't happen condition […] (x+189 pages)
Strong, John A., ed. (2013-03-12) [1991]. "Chapter 2.11 Hazards and Glitches". Basic Digital Electronics. Physics and Its Applications. Vol. 2 (reprint of 1st ed.). Chapman & Hall / Springer Science & Business Media, B.V. pp. 28–29. ISBN 978-9-40113118-6. LCCN 90-2689. Retrieved 2020-03-30. (220 pages)
Iman, Sasan; Pedram, Massoud (1998) [1997-11-30]. "Chapter 6. Logic Minimization for Low Power". Written at University of Southern California, California, USA. Logic Synthesis for Low Power VLSI Designs (1 ed.). Boston, Massachusetts, USA / New York, USA: Kluwer Academic Publishers / Springer Science+Business Media, LLC. pp. 109–148 [110]. doi:10.1007/978-1-4615-5453-0_6. ISBN 978-0-7923-8076-4. LCCN 97-042097. Archived from the original on 2024-07-26. Retrieved 2024-07-26. (xv+236 pages) [16]

nii.ac.jp

ci.nii.ac.jp

Morris, Noel Malcolm (1969). Logic Circuits. European electrical and electronic engineering series (1 ed.). London, UK: McGraw-Hill. pp. 31, 96, 114. ISBN 0-07094106-8. LCCN 72458600. ISBN 978-0-07094106-9. NCID BA12104142. Retrieved 2021-03-28. p. 31: […] sometimes known as a can't happen condition […] (x+189 pages)

philectrosophy.com

Karnaugh, Maurice (November 1953) [1953-04-23, 1953-03-17]. "The Map Method for Synthesis of Combinational Logic Circuits" (PDF). Transactions of the American Institute of Electrical Engineers, Part I: Communication and Electronics. 72 (5): 593–599. doi:10.1109/TCE.1953.6371932. S2CID 51636736. Paper 53-217. Archived from the original (PDF) on 2017-04-16. Retrieved 2017-04-16. (7 pages)

researchgate.net

Rushdi, Ali Muhammad Ali; Badawi, Raid Mohammad Salih (January 2017). "Karnaugh-Map Utilization in Boolean Analysis: The Case of War Termination". Journal of Engineering and Computer Sciences. Qualitative Comparative Analysis. 10 (1). Department of Electrical and Computer Engineering, King Abdulaziz University, Jeddah, Saudi Arabi / Qassim University: 53–88 [54–55, 57, 61–63]. Rabi'II 1438H. Archived from the original on 2021-02-16. Retrieved 2021-02-17. [13]

semanticscholar.org

api.semanticscholar.org

Karnaugh, Maurice (November 1953) [1953-04-23, 1953-03-17]. "The Map Method for Synthesis of Combinational Logic Circuits" (PDF). Transactions of the American Institute of Electrical Engineers, Part I: Communication and Electronics. 72 (5): 593–599. doi:10.1109/TCE.1953.6371932. S2CID 51636736. Paper 53-217. Archived from the original (PDF) on 2017-04-16. Retrieved 2017-04-16. (7 pages)
Moore, Edward Forrest (December 1958). "Samuel H. Caldwell. Switching circuits and logical design. John Wiley & Sons, Inc., New York 1958, and Chapman & Hall Limited, London 1958, xvii + 686 pp". The Journal of Symbolic Logic (Review). 23 (4): 433–434. doi:10.2307/2964020. JSTOR 2964020. S2CID 57495605. p. 433: […] what Caldwell calls "optional entries" […] other authors have called "invalid combinations", "don't cares", "vacuous combinations" […] (2 pages)
Ginsburg, Seymour (1959-04-01). "On the Reduction of Superfluous States in a Sequential Machine". Journal of the ACM. 6 (2): 259–282. doi:10.1145/320964.320983. S2CID 10118067.
Kumar, Ramayya; Kropf, Thomas, eds. (1995). "Theorem Provers in Circuit Design". Proceedings of the Second International Conference, TPCD '94, Bad Herrenalb, Germany, September 26–28, 1994. Lecture Notes in Computer Science. Vol. 901 (1st ed.). Springer-Verlag Berlin Heidelberg. p. 136. doi:10.1007/3-540-59047-1. ISBN 978-3-540-59047-7. ISSN 0302-9743. S2CID 42116934. Retrieved 2020-03-30. (viii+312 pages)

semicon-storage.com

toshiba.semicon-storage.com

Toshiba 8 Bit Microcontroller TLCS-870/C Series TMP86PM29BUG (2 ed.). Toshiba Corporation. 2008-08-29 [2007-10-11]. p. 61. Archived from the original on 2020-04-19. p. 61: […] WDTCR1 is a write-only register and must not be used with any of read-modify-write instructions. If WDTCR1 is read, a don't care is read. […] (9+vi+190 pages)

springer.com

page-one.springer.com

Iman, Sasan; Pedram, Massoud (1998) [1997-11-30]. "Chapter 6. Logic Minimization for Low Power". Written at University of Southern California, California, USA. Logic Synthesis for Low Power VLSI Designs (1 ed.). Boston, Massachusetts, USA / New York, USA: Kluwer Academic Publishers / Springer Science+Business Media, LLC. pp. 109–148 [110]. doi:10.1007/978-1-4615-5453-0_6. ISBN 978-0-7923-8076-4. LCCN 97-042097. Archived from the original on 2024-07-26. Retrieved 2024-07-26. (xv+236 pages) [16]

link.springer.com

Kumar, Ramayya; Kropf, Thomas, eds. (1995). "Theorem Provers in Circuit Design". Proceedings of the Second International Conference, TPCD '94, Bad Herrenalb, Germany, September 26–28, 1994. Lecture Notes in Computer Science. Vol. 901 (1st ed.). Springer-Verlag Berlin Heidelberg. p. 136. doi:10.1007/3-540-59047-1. ISBN 978-3-540-59047-7. ISSN 0302-9743. S2CID 42116934. Retrieved 2020-03-30. (viii+312 pages)

web.archive.org

Karnaugh, Maurice (November 1953) [1953-04-23, 1953-03-17]. "The Map Method for Synthesis of Combinational Logic Circuits" (PDF). Transactions of the American Institute of Electrical Engineers, Part I: Communication and Electronics. 72 (5): 593–599. doi:10.1109/TCE.1953.6371932. S2CID 51636736. Paper 53-217. Archived from the original (PDF) on 2017-04-16. Retrieved 2017-04-16. (7 pages)
Keister, William; Ritchie, Alistair E.; Washburn, Seth H. (1951). The Design Of Switching Circuits. The Bell Telephone Laboratories Series (1 ed.). D. Van Nostrand Company, Inc. p. 147. Archived from the original on 2020-05-09. Retrieved 2020-05-09. [1] (2+xx+556+2 pages)
Kautz, William H. (June 1954). "Optimized Data Encoding for Digital Computers". Convention Record of the I.R.E., 1954 National Convention, Part 4 - Electronic Computers and Information Theory. Session 19: Information Theory III - Speed and Computation. Stanford Research Institute, Stanford, California, USA: I.R.E.: 47–57. Archived from the original on 2020-07-03. Retrieved 2020-07-03. [2][3][4][5][6][7][8][9][10][11][12] (11 pages)
Rushdi, Ali Muhammad Ali; Badawi, Raid Mohammad Salih (January 2017). "Karnaugh-Map Utilization in Boolean Analysis: The Case of War Termination". Journal of Engineering and Computer Sciences. Qualitative Comparative Analysis. 10 (1). Department of Electrical and Computer Engineering, King Abdulaziz University, Jeddah, Saudi Arabi / Qassim University: 53–88 [54–55, 57, 61–63]. Rabi'II 1438H. Archived from the original on 2021-02-16. Retrieved 2021-02-17. [13]
Morris, Noel Malcolm (January 1969) [1968-12-16]. "Code and Code Converters - Part 2: Mapping techniques and code converters" (PDF). Wireless World. 75 (1399). Iliffe Technical Publications Ltd.: 34–37. Archived (PDF) from the original on 2021-03-09. Retrieved 2020-05-09. [14]
Holdsworth, Brian; Woods, Clive (2002). Digital Logic Design (4 ed.). Newnes Books / Elsevier Science. pp. 55–56, 251. ISBN 0-7506-4588-2. ISBN 978-0-08047730-5. Retrieved 2020-04-19.{{cite book}}: CS1 maint: ignored ISBN errors (link) (519 pages) [15]
Iman, Sasan; Pedram, Massoud (1998) [1997-11-30]. "Chapter 6. Logic Minimization for Low Power". Written at University of Southern California, California, USA. Logic Synthesis for Low Power VLSI Designs (1 ed.). Boston, Massachusetts, USA / New York, USA: Kluwer Academic Publishers / Springer Science+Business Media, LLC. pp. 109–148 [110]. doi:10.1007/978-1-4615-5453-0_6. ISBN 978-0-7923-8076-4. LCCN 97-042097. Archived from the original on 2024-07-26. Retrieved 2024-07-26. (xv+236 pages) [16]
Toshiba 8 Bit Microcontroller TLCS-870/C Series TMP86PM29BUG (2 ed.). Toshiba Corporation. 2008-08-29 [2007-10-11]. p. 61. Archived from the original on 2020-04-19. p. 61: […] WDTCR1 is a write-only register and must not be used with any of read-modify-write instructions. If WDTCR1 is read, a don't care is read. […] (9+vi+190 pages)
Lind, Larry Frederick; Nelson, John Christopher Cunliffe (1977-04-01). "2.3.7. Don't cares". Analysis and Design of Sequential Digital Systems. Electrical and Electronic Engineering (1 ed.). London & Basingstoke, UK: The Macmillan Press Ltd. pp. 20, 121–122. doi:10.1007/978-1-349-15757-0. ISBN 0-333-19266-4. Archived from the original on 2020-04-30. Retrieved 2020-04-30. (4+viii+146+6 pages)
"Power-Up Don't Care logic option". Quartus Help. Intel Corporation. 2017. Archived from the original on 2020-04-19. Retrieved 2020-04-19.
"Power-up level of register <name> is not specified – using unspecifed power-up level". Knowledge Base. Intel Corporation. 2020. Archived from the original on 2020-04-19. Retrieved 2020-04-19.

wikidata.org

Marcus, Mitchell Paul [at Wikidata] (c. 1970). "Chapter 6. Tabular method of simplification: Optional combinations". Written at IBM, Endicott / Binghampton, New York, USA. Switching circuits for engineers. Habana, Cuba: Edicion Revolucionaria, Instituto del Libro. pp. 70–72 [71]. 19 No. 1002. (xiv+2+296+2 pages)

worldcat.org

search.worldcat.org

Maiti, Tapas Kr.; Chattopadhyay, Santanu (2008-05-18). Don't care filling for power minimization in VLSI circuit testing. 2008 IEEE International Symposium on Circuits and Systems (ISCAS) (1 ed.). Seattle, Washington, USA: Institute of Electrical and Electronics Engineers. pp. 2637–2640. doi:10.1109/ISCAS.2008.4541998. eISSN 2158-1525. ISBN 978-1-4244-1683-7. ISSN 0271-4302.
Kumar, Ramayya; Kropf, Thomas, eds. (1995). "Theorem Provers in Circuit Design". Proceedings of the Second International Conference, TPCD '94, Bad Herrenalb, Germany, September 26–28, 1994. Lecture Notes in Computer Science. Vol. 901 (1st ed.). Springer-Verlag Berlin Heidelberg. p. 136. doi:10.1007/3-540-59047-1. ISBN 978-3-540-59047-7. ISSN 0302-9743. S2CID 42116934. Retrieved 2020-03-30. (viii+312 pages)

worldradiohistory.com

Kautz, William H. (June 1954). "Optimized Data Encoding for Digital Computers". Convention Record of the I.R.E., 1954 National Convention, Part 4 - Electronic Computers and Information Theory. Session 19: Information Theory III - Speed and Computation. Stanford Research Institute, Stanford, California, USA: I.R.E.: 47–57. Archived from the original on 2020-07-03. Retrieved 2020-07-03. [2][3][4][5][6][7][8][9][10][11][12] (11 pages)
Morris, Noel Malcolm (January 1969) [1968-12-16]. "Code and Code Converters - Part 2: Mapping techniques and code converters" (PDF). Wireless World. 75 (1399). Iliffe Technical Publications Ltd.: 34–37. Archived (PDF) from the original on 2021-03-09. Retrieved 2020-05-09. [14]