Flash memory (English Wikipedia)

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Lee, Jang-Sik (18 October 2011). "Review paper: Nano-floating gate memory devices". Electronic Materials Letters. 7 (3). Korean Institute of Metals and Materials: 175–183. Bibcode:2011EML.....7..175L. doi:10.1007/s13391-011-0901-5. S2CID 110503864.
Meena, Jagan Singh; Sze, Simon Min; Chand, Umesh; Tseng, Tseung-Yuen (25 September 2014). "Overview of emerging nonvolatile memory technologies". Nanoscale Research Letters. 9 (1): 526. Bibcode:2014NRL.....9..526M. doi:10.1186/1556-276x-9-526. ISSN 1556-276X. PMC 4182445. PMID 25278820. 526.
Fastow, Richard M.; Ahmed, Khaled Z.; Haddad, Sameer; Randolph, Mark; Huster, C.; Hom, P. (April 2000). "Bake induced charge gain in NOR flash cells". IEEE Electron Device Letters. 21 (4): 184–186. Bibcode:2000IEDL...21..184F. doi:10.1109/55.830976. ISSN 1558-0563. S2CID 24724751.
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Tanzawa, T.; Takano, Y.; Watanabe, K.; Atsumi, S. (2002). "High-voltage transistor scaling circuit techniques for high-density negative-gate channel-erasing NOR flash memories". IEEE Journal of Solid-State Circuits. 37 (10): 1318–1325. Bibcode:2002IJSSC..37.1318T. doi:10.1109/JSSC.2002.803045.

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^{[dead link]}

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