Frequency synthesizer (English Wikipedia)

Analysis of information sources in references of the Wikipedia article "Frequency synthesizer" in English language version.

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Popiel-Gorski (1975, p. 25) Popiel-Gorski, Jerzy (1975), Frequency Synthesis: Techniques and Applications, IEEE Press, ISBN 0-87942-039-1
Crawford (1994, p. 4) Crawford, James A. (1994), Frequency Synthesizer Design Handbook, Artech House, ISBN 0-89006-440-7

doi.org

doi.org

Gillette, G.C. (1969). "Digiphase Synthesizer". 23rd Annual Symposium on Frequency Control. pp. 201–210. doi:10.1109/FREQ.1969.199763.
Xiu, Liming (2008). "The concept of time-average-frequency and mathematical analysis of flying-adder frequency synthesis architecture". IEEE Circuits and Systems Magazine. 8 (3): 27–51. doi:10.1109/mcas.2008.928421. ISSN 1531-636X. S2CID 21809964.
""Flying-Adder" PLL Based Synchronization Mechanism for Data Packet Transport". doi:10.1109/DCAS.2007.4433203. Retrieved 2024-01-09.

dx.doi.org

Xiu, Liming (2008). "The concept of time-average-frequency and mathematical analysis of flying-adder frequency synthesis architecture". IEEE Circuits and Systems Magazine. 8 (3): 27–51. doi:10.1109/mcas.2008.928421. ISSN 1531-636X. S2CID 21809964.

hpmemoryproject.org

HP 5100A - HP Memory Project (tunable, 0.01 Hz-resolution Direct Frequency Synthesizer introduced in 1964; to HP, direct synthesis meant PLL not used, while indirect meant a PLL was used)

ieee.org

ieeexplore.ieee.org

""Flying-Adder" PLL Based Synchronization Mechanism for Data Packet Transport". doi:10.1109/DCAS.2007.4433203. Retrieved 2024-01-09.

national.com

Banerjee (2006) Banerjee, Dean (2006), PLL Performance, Simulation and Design Handbook (4th ed.), National Semiconductor, archived from the original on 2008-11-21, retrieved 2008-10-20. Also PDF version.

semanticscholar.org

api.semanticscholar.org

Xiu, Liming (2008). "The concept of time-average-frequency and mathematical analysis of flying-adder frequency synthesis architecture". IEEE Circuits and Systems Magazine. 8 (3): 27–51. doi:10.1109/mcas.2008.928421. ISSN 1531-636X. S2CID 21809964.

smu.edu

s2.smu.edu

""Flying-adder" frequency & phase synthesis architectures". Retrieved 2024-01-09.

web.archive.org

Banerjee (2006) Banerjee, Dean (2006), PLL Performance, Simulation and Design Handbook (4th ed.), National Semiconductor, archived from the original on 2008-11-21, retrieved 2008-10-20. Also PDF version.

worldcat.org

search.worldcat.org

Xiu, Liming (2008). "The concept of time-average-frequency and mathematical analysis of flying-adder frequency synthesis architecture". IEEE Circuits and Systems Magazine. 8 (3): 27–51. doi:10.1109/mcas.2008.928421. ISSN 1531-636X. S2CID 21809964.