Gary Patton (English Wikipedia)

Analysis of information sources in references of the Wikipedia article "Gary Patton" in English language version.

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7web.archive.org

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7ibm.com

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2harvard.edu

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2doi.org

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2semanticscholar.org

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archive.today

"IEEE Frederik Philips Award recipients". Institute of Electrical and Electronics Engineers (IEEE). Archived from the original on August 26, 2014.

chiphistory.org

Patton, Gary (2008). "VLSI Research Interview: What Math & Science Have Done For Me". Chip History Center.
"Chip Making Industry Hall of Fame". The Chip History Center - The Virtual Museum of Semiconductors. 2016.

doi.org

G.L. Patton, J.C. Bravman, J.D. Plummer (November 1986). "Physics, Technology, and Modeling of Polysilicon Emitter Contacts for VLSI Bipolar Transistors". IEEE Trans. Electron Devices. ED-33 (11): 1754–1768. Bibcode:1986ITED...33.1754P. doi:10.1109/T-ED.1986.22738. S2CID 42026047.{{cite journal}}: CS1 maint: multiple names: authors list (link)
G.L. Patton, J.H. Comfort, B.S. Meyerson, E.F. Crabbe, G.J. Scilla, E. deFresart, J.M.C. Stork, J.Y.-C. Sun, D.L. Harame, J.N. Burghartz (April 1990). "75 GHz SiGe-Base Heterojunction Bipolar Transistors". IEEE Electron Device Letters. 11: 171. Bibcode:1990IEDL...11..171P. doi:10.1109/55.61782. S2CID 37477460.{{cite journal}}: CS1 maint: multiple names: authors list (link)

gatech.edu

cc.gatech.edu

"IEEE Fellows Class of 2010" (PDF).

globalfoundries.com

"GLOBALFOUNDRIES on Track to Deliver Leading-Performance 7nm FinFET Technology". GLOBALFOUNDRIES. June 13, 2017.

harvard.edu

ui.adsabs.harvard.edu

G.L. Patton, J.C. Bravman, J.D. Plummer (November 1986). "Physics, Technology, and Modeling of Polysilicon Emitter Contacts for VLSI Bipolar Transistors". IEEE Trans. Electron Devices. ED-33 (11): 1754–1768. Bibcode:1986ITED...33.1754P. doi:10.1109/T-ED.1986.22738. S2CID 42026047.{{cite journal}}: CS1 maint: multiple names: authors list (link)
G.L. Patton, J.H. Comfort, B.S. Meyerson, E.F. Crabbe, G.J. Scilla, E. deFresart, J.M.C. Stork, J.Y.-C. Sun, D.L. Harame, J.N. Burghartz (April 1990). "75 GHz SiGe-Base Heterojunction Bipolar Transistors". IEEE Electron Device Letters. 11: 171. Bibcode:1990IEDL...11..171P. doi:10.1109/55.61782. S2CID 37477460.{{cite journal}}: CS1 maint: multiple names: authors list (link)

ibm.com

www-03.ibm.com

"AMD and IBM Detail Early Results Using Immersion and Ultra Low-K in 45nm Chips". IBM. December 12, 2006. Archived from the original on June 2, 2007.
"IBM-Led Chip Alliance Delivers Major Semiconductor Performance Leap, Power Savings Using Innovative "High-K/Metal Gate" Material". IBM. April 14, 2008. Archived from the original on April 20, 2008.
"IBM Develops Computational Scaling Solution for Next Generation "22nm" Semiconductors". IBM. September 17, 2008. Archived from the original on July 9, 2011.
"BM Technology Alliance Announces Availability of Advanced 28-Nanometer, Low-Power Semiconductor Technology". IBM. April 16, 2009. Archived from the original on April 19, 2009.
"IBM Unveils World's Fastest On-Chip Dynamic Memory Technology". IBM. February 14, 2007. Archived from the original on February 16, 2007.
"IBM Announces Industry's Densest, Fastest On-Chip Dynamic Memory in 32-Nanometer, Silicon-on-Insulator Technology". IBM. September 18, 2009. Archived from the original on September 25, 2009.
"IBM Research Alliance Produces Industry's First 7nm Node Test Chips". IBM. July 9, 2015. Archived from the original on July 11, 2015.

ieee.org

"IEEE Fellows Directory". Institute of Electrical and Electronics Engineers (IEEE).
"IEEE Frederik Philips Award recipients". Institute of Electrical and Electronics Engineers (IEEE). Archived from the original on August 26, 2014.

ieeer1.org

"IEEE R1 Highlights".

semanticscholar.org

api.semanticscholar.org

G.L. Patton, J.C. Bravman, J.D. Plummer (November 1986). "Physics, Technology, and Modeling of Polysilicon Emitter Contacts for VLSI Bipolar Transistors". IEEE Trans. Electron Devices. ED-33 (11): 1754–1768. Bibcode:1986ITED...33.1754P. doi:10.1109/T-ED.1986.22738. S2CID 42026047.{{cite journal}}: CS1 maint: multiple names: authors list (link)
G.L. Patton, J.H. Comfort, B.S. Meyerson, E.F. Crabbe, G.J. Scilla, E. deFresart, J.M.C. Stork, J.Y.-C. Sun, D.L. Harame, J.N. Burghartz (April 1990). "75 GHz SiGe-Base Heterojunction Bipolar Transistors". IEEE Electron Device Letters. 11: 171. Bibcode:1990IEDL...11..171P. doi:10.1109/55.61782. S2CID 37477460.{{cite journal}}: CS1 maint: multiple names: authors list (link)

semi.org

"SEMI SCIS Special Interest Group".

tomshardware.com

"Intel Hires GlobalFoundries CTO Gary Patton to Lead Design Enablement". 12 December 2019.

web.archive.org

"AMD and IBM Detail Early Results Using Immersion and Ultra Low-K in 45nm Chips". IBM. December 12, 2006. Archived from the original on June 2, 2007.
"IBM-Led Chip Alliance Delivers Major Semiconductor Performance Leap, Power Savings Using Innovative "High-K/Metal Gate" Material". IBM. April 14, 2008. Archived from the original on April 20, 2008.
"IBM Develops Computational Scaling Solution for Next Generation "22nm" Semiconductors". IBM. September 17, 2008. Archived from the original on July 9, 2011.
"BM Technology Alliance Announces Availability of Advanced 28-Nanometer, Low-Power Semiconductor Technology". IBM. April 16, 2009. Archived from the original on April 19, 2009.
"IBM Unveils World's Fastest On-Chip Dynamic Memory Technology". IBM. February 14, 2007. Archived from the original on February 16, 2007.
"IBM Announces Industry's Densest, Fastest On-Chip Dynamic Memory in 32-Nanometer, Silicon-on-Insulator Technology". IBM. September 18, 2009. Archived from the original on September 25, 2009.
"IBM Research Alliance Produces Industry's First 7nm Node Test Chips". IBM. July 9, 2015. Archived from the original on July 11, 2015.

wesrch.com

Patton, Gary (April 29, 2008). "VLSI Research Interview: IBM's 32nm Hi-K Chip Technology: An interview with Gary Patton". weSRCH.
Patton, Gary (October 15, 2015). "VLSI Research Interview: FinFET vs FDSOI in the jump to 7nm". weSRCH.

youtube.com

Patton, Gary (2013). "Collaboration as a Way Forward in Semiconductor Technology". IESA Vision Summit, Bangalore, India.