Haswell (microarchitecture) (English Wikipedia)

Analysis of information sources in references of the Wikipedia article "Haswell (microarchitecture)" in English language version.

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anandtech.com (Global: 1,383rd place; English: 878th place)

archive.today (Global: 14th place; English: 14th place)

arstechnica.com (Global: 388th place; English: 265th place)

  • Andrew Cunningham (2013-06-04). "The U is for Ultrabook: Intel's low-power, dual-core Haswell CPUs unveiled". arstechnica.com. Retrieved 2013-10-22.
  • "The technical details behind Intel's 7 Watt Ivy Bridge CPUs". Arstechnica.com. 2013-01-14. Retrieved 2013-12-22. If the CPU needs to work hard for an extended period of time and the laptop gets warmer, it will slowly ramp down its speed until it's operating at its stated TDP. [...] There are two OEM-configurable "power level" states that define how quick the CPU can be in these situations: PL2 tells the processor how much power it's allowed to use when it needs a short burst of speed, and PL1 defines how quickly the processor can run under sustained load. [...] This is at the heart of what Intel is doing with the Y-series processors: their maximum TDP has been lowered four watts, from 17 to 13. Intel is also validating them for use at two lower PL1 values: 10 watts and 7 watts. This is where the marketing we discussed earlier comes in—rather than keeping these values under the covers as it has so far been content to do, Intel has taken that lowest value, put it on its product pages, and called it SDP.

asus.com (Global: low place; English: 9,088th place)

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intel.com (Global: 1,118th place; English: 825th place)

intel.com

  • "Intel Developer Forum". Intel.com. Intel. Retrieved 2012-01-04.
  • "Desktop 4th Generation Intel Core Processor Family, Desktop Intel Pentium Processor Family, and Desktop Intel Celeron Processor Family: Specification Update (Revision 014)" (PDF). Intel. June 2014. p. 46. Retrieved 2014-08-13. Under a complex set of internal timing conditions and system events, software using the Intel TSX (Transactional Synchronization Extensions) instructions may observe unpredictable system behavior.
  • "Intel public roadmap, 2H2013" (PDF). Retrieved 13 September 2014.
  • "Intel Xeon Processor E5 v3 Product Families: Specification Update" (PDF). Intel. January 2015. pp. 7–8. Retrieved 2015-02-03.
  • "Intel Xeon Processor E5 v3 Product Families: Specification Update" (PDF). Intel. October 2014. pp. 10–11. Retrieved 2014-10-17.
  • "Product Specifications". www.intel.com.
  • "4th Generation Intel Core processor based on Mobile M-Processor and H-Processor Lines Datasheet, Volume 1 of 2" (PDF). Intel.com. December 2013. Retrieved 2013-12-22. Configurable TDP (cTDP) and Low-Power Mode (LPM) form a design vector where the processor behavior and package TDP are dynamically adjusted to a desired system performance and power envelope. [...] With cTDP, the processor is now capable of altering the maximum sustained power with an alternate guaranteed frequency. Configurable TDP allows operation in situations where extra cooling is available or situations where a cooler and quieter mode of operation is desired.
  • "4th Generation Intel Core processor based on Mobile U-Processor and Y-Processor Lines Datasheet, Volume 1 of 2" (PDF). intel.com. December 2013. Retrieved 2013-12-22.

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