Intel BCD opcodes (English Wikipedia)

Analysis of information sources in references of the Wikipedia article "Intel BCD opcodes" in English language version.

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intel.com

software.intel.com

  • "4.7 BCD and packed BCD integers". Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 1: Basic Architecture (PDF). Version 072. Vol. 1. Intel Corporation. 2020-05-27 [1997]. pp. 3–2, 4-9–4-11 [4-10]. 253665-072US. Archived (PDF) from the original on 2020-08-06. Retrieved 2020-08-06. […] When operating on BCD integers in general-purpose registers, the BCD values can be unpacked (one BCD digit per byte) or packed (two BCD digits per byte). The value of an unpacked BCD integer is the binary value of the low halfbyte (bits 0 through 3). The high half-byte (bits 4 through 7) can be any value during addition and subtraction, but must be zero during multiplication and division. Packed BCD integers allow two BCD digits to be contained in one byte. Here, the digit in the high half-byte is more significant than the digit in the low half-byte. […] When operating on BCD integers in x87 FPU data registers, BCD values are packed in an 80-bit format and referred to as decimal integers. In this format, the first 9 bytes hold 18 BCD digits, 2 digits per byte. The least-significant digit is contained in the lower half-byte of byte 0 and the most-significant digit is contained in the upper half-byte of byte 9. The most significant bit of byte 10 contains the sign bit (0 = positive and 1 = negative; bits 0 through 6 of byte 10 are don't care bits). Negative decimal integers are not stored in two's complement form; they are distinguished from positive decimal integers only by the sign bit. The range of decimal integers that can be encoded in this format is −1018 + 1 to 1018 − 1. The decimal integer format exists in memory only. When a decimal integer is loaded in an x87 FPU data register, it is automatically converted to the double-extended-precision floating-point format. All decimal integers are exactly representable in double extended-precision format. […] [1]

intel.com

  • "4.7 BCD and packed BCD integers". Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 1: Basic Architecture (PDF). Version 072. Vol. 1. Intel Corporation. 2020-05-27 [1997]. pp. 3–2, 4-9–4-11 [4-10]. 253665-072US. Archived (PDF) from the original on 2020-08-06. Retrieved 2020-08-06. […] When operating on BCD integers in general-purpose registers, the BCD values can be unpacked (one BCD digit per byte) or packed (two BCD digits per byte). The value of an unpacked BCD integer is the binary value of the low halfbyte (bits 0 through 3). The high half-byte (bits 4 through 7) can be any value during addition and subtraction, but must be zero during multiplication and division. Packed BCD integers allow two BCD digits to be contained in one byte. Here, the digit in the high half-byte is more significant than the digit in the low half-byte. […] When operating on BCD integers in x87 FPU data registers, BCD values are packed in an 80-bit format and referred to as decimal integers. In this format, the first 9 bytes hold 18 BCD digits, 2 digits per byte. The least-significant digit is contained in the lower half-byte of byte 0 and the most-significant digit is contained in the upper half-byte of byte 9. The most significant bit of byte 10 contains the sign bit (0 = positive and 1 = negative; bits 0 through 6 of byte 10 are don't care bits). Negative decimal integers are not stored in two's complement form; they are distinguished from positive decimal integers only by the sign bit. The range of decimal integers that can be encoded in this format is −1018 + 1 to 1018 − 1. The decimal integer format exists in memory only. When a decimal integer is loaded in an x87 FPU data register, it is automatically converted to the double-extended-precision floating-point format. All decimal integers are exactly representable in double extended-precision format. […] [1]

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ucr.edu

webster.cs.ucr.edu

web.archive.org

  • "4.7 BCD and packed BCD integers". Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 1: Basic Architecture (PDF). Version 072. Vol. 1. Intel Corporation. 2020-05-27 [1997]. pp. 3–2, 4-9–4-11 [4-10]. 253665-072US. Archived (PDF) from the original on 2020-08-06. Retrieved 2020-08-06. […] When operating on BCD integers in general-purpose registers, the BCD values can be unpacked (one BCD digit per byte) or packed (two BCD digits per byte). The value of an unpacked BCD integer is the binary value of the low halfbyte (bits 0 through 3). The high half-byte (bits 4 through 7) can be any value during addition and subtraction, but must be zero during multiplication and division. Packed BCD integers allow two BCD digits to be contained in one byte. Here, the digit in the high half-byte is more significant than the digit in the low half-byte. […] When operating on BCD integers in x87 FPU data registers, BCD values are packed in an 80-bit format and referred to as decimal integers. In this format, the first 9 bytes hold 18 BCD digits, 2 digits per byte. The least-significant digit is contained in the lower half-byte of byte 0 and the most-significant digit is contained in the upper half-byte of byte 9. The most significant bit of byte 10 contains the sign bit (0 = positive and 1 = negative; bits 0 through 6 of byte 10 are don't care bits). Negative decimal integers are not stored in two's complement form; they are distinguished from positive decimal integers only by the sign bit. The range of decimal integers that can be encoded in this format is −1018 + 1 to 1018 − 1. The decimal integer format exists in memory only. When a decimal integer is loaded in an x87 FPU data register, it is automatically converted to the double-extended-precision floating-point format. All decimal integers are exactly representable in double extended-precision format. […] [1]
  • Hyde, Randall (September 2003). Decimal Arithmetic. No Starch Press. Archived from the original on 2008-11-02. Retrieved 2008-10-18. {{cite book}}: |work= ignored (help)
  • Volume 2A: Instruction Set Reference, A-M (PDF). Vol. 2A. Intel Corporation. 2007-05-17. Archived from the original (PDF) on 2008-03-15. Retrieved 2007-06-27. {{cite book}}: |work= ignored (help)