Micro-operation (English Wikipedia)

Analysis of information sources in references of the Wikipedia article "Micro-operation" in English language version.

refsWebsite

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3web.archive.org

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1,672^nd place

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3,063^rd place

2,041^st place

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1semanticscholar.org

11^th place

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adelphi.edu (Global: low place; English: low place)

home.adelphi.edu

"Lecture 9 - Register Transfer and Microoperations" (PDF). Systems I: Computer Organization and Architecture. p. 2.

agner.org (Global: low place; English: low place)

Agner Fog (2014-02-19). "The microarchitecture of Intel, AMD and VIA CPUs: An optimization guide for assembly programmers and compiler makers" (PDF). agner.org. Retrieved 2014-03-21.

anandtech.com (Global: 1,383^rd place; English: 878^th place)

"Intel Pentium 4 1.4GHz & 1.5GHz". AnandTech. 2000-11-20. Archived from the original on 2010-05-26. Retrieved 2013-10-06.

doi.org (Global: 2^nd place; English: 2^nd place)

Baruch Solomon; Avi Mendelson; Doron Orenstein; Yoav Almog; Ronny Ronen (August 2001). "Micro-Operation Cache: A Power Aware Frontend for Variable Instruction Length ISA" (PDF). ISLPED'01: Proceedings of the 2001 International Symposium on Low Power Electronics and Design (IEEE Cat. No.01TH8581). Intel. pp. 4–9. doi:10.1109/LPE.2001.945363. ISBN 1-58113-371-5. S2CID 10934861. Retrieved 2014-03-21.

maine.edu (Global: low place; English: low place)

umcs.maine.edu

"Computer Organization and Architecture, Chapter 15. Control Unit Operation" (PDF). umcs.maine.edu. 2010-03-16. Retrieved 2014-12-29.

semanticscholar.org (Global: 11^th place; English: 8^th place)

api.semanticscholar.org

Baruch Solomon; Avi Mendelson; Doron Orenstein; Yoav Almog; Ronny Ronen (August 2001). "Micro-Operation Cache: A Power Aware Frontend for Variable Instruction Length ISA" (PDF). ISLPED'01: Proceedings of the 2001 International Symposium on Low Power Electronics and Design (IEEE Cat. No.01TH8581). Intel. pp. 4–9. doi:10.1109/LPE.2001.945363. ISBN 1-58113-371-5. S2CID 10934861. Retrieved 2014-03-21.

tamu.edu (Global: 1,672^nd place; English: 1,262^nd place)

sc.tamu.edu

Michael E. Thomadakis (2011-03-17). "The Architecture of the Nehalem Processor and Nehalem-EP SMP Platforms" (PDF). Texas A&M University. Archived from the original (PDF) on 2014-08-11. Retrieved 2014-03-21.

uci.edu (Global: 3,063^rd place; English: 2,041^st place)

cecs.uci.edu

Baruch Solomon; Avi Mendelson; Doron Orenstein; Yoav Almog; Ronny Ronen (August 2001). "Micro-Operation Cache: A Power Aware Frontend for Variable Instruction Length ISA" (PDF). ISLPED'01: Proceedings of the 2001 International Symposium on Low Power Electronics and Design (IEEE Cat. No.01TH8581). Intel. pp. 4–9. doi:10.1109/LPE.2001.945363. ISBN 1-58113-371-5. S2CID 10934861. Retrieved 2014-03-21.

unipi.it (Global: low place; English: low place)

sba.unipi.it

FM1600B Microcircuit Computer Ferranti Digital Systems (PDF). Bracknell, Berkshire, UK: Ferranti Limited, Digital Systems Department. October 1968 [September 1968]. List DSD 68/6. Archived (PDF) from the original on 2020-05-19. Retrieved 2020-05-19.

web.archive.org (Global: 1^st place; English: 1^st place)

FM1600B Microcircuit Computer Ferranti Digital Systems (PDF). Bracknell, Berkshire, UK: Ferranti Limited, Digital Systems Department. October 1968 [September 1968]. List DSD 68/6. Archived (PDF) from the original on 2020-05-19. Retrieved 2020-05-19.
Michael E. Thomadakis (2011-03-17). "The Architecture of the Nehalem Processor and Nehalem-EP SMP Platforms" (PDF). Texas A&M University. Archived from the original (PDF) on 2014-08-11. Retrieved 2014-03-21.
"Intel Pentium 4 1.4GHz & 1.5GHz". AnandTech. 2000-11-20. Archived from the original on 2010-05-26. Retrieved 2013-10-06.