Network processor (English Wikipedia)

Analysis of information sources in references of the Wikipedia article "Network processor" in English language version.

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archive.org

Buono, Daniele; Mencagli, Gabriele (21–25 July 2014). Run-time mechanisms for fine-grained parallelism on network processors: The TILEPro64 experience (PDF). 2014 International Conference on High Performance Computing Simulation (HPCS 2014). Bologna, Italy. pp. 55–64. doi:10.1109/HPCSim.2014.6903669. ISBN 978-1-4799-5313-4. Archived (PDF) from the original on 27 March 2019. Alt URL

Gibb, Glen; Varghese, George; Horowitz, Mark; McKeown, Nick (October 2013). "Design principles for packet parsers". Architectures for Networking and Communications Systems. pp. 13–24. doi:10.1109/ANCS.2013.6665172. ISBN 978-1-4799-1641-2. S2CID 12282067.
Kaufmann, Antoine; Peter, SImon; Sharma, Naveen Kr.; Anderson, Thomas; Krishnamurthy, Arvind (2016-03-25). "High Performance Packet Processing with FlexNIC". Proceedings of the Twenty-First International Conference on Architectural Support for Programming Languages and Operating Systems. ASPLOS '16. New York, NY, USA: Association for Computing Machinery. pp. 67–81. doi:10.1145/2872362.2872367. ISBN 978-1-4503-4091-5. S2CID 9625891.
Buono, Daniele; Mencagli, Gabriele (21–25 July 2014). Run-time mechanisms for fine-grained parallelism on network processors: The TILEPro64 experience (PDF). 2014 International Conference on High Performance Computing Simulation (HPCS 2014). Bologna, Italy. pp. 55–64. doi:10.1109/HPCSim.2014.6903669. ISBN 978-1-4799-5313-4. Archived (PDF) from the original on 27 March 2019. Alt URL

Gibb, Glen; Varghese, George; Horowitz, Mark; McKeown, Nick (October 2013). "Design principles for packet parsers". Architectures for Networking and Communications Systems. pp. 13–24. doi:10.1109/ANCS.2013.6665172. ISBN 978-1-4799-1641-2. S2CID 12282067.

Bosshart, Pat; Gibb, Glen; Kim, Hun-Seok; Varghese, George; McKeown, Nick; Izzard, Martin; Mujica, Fernando; Horowitz, Mark (2013-08-01). "Forwarding Metamorphosis: Fast Programmable Match-Action Processing in Hardware for SDN". {{cite journal}}: Cite journal requires |journal= (help)

Gibb, Glen; Varghese, George; Horowitz, Mark; McKeown, Nick (October 2013). "Design principles for packet parsers". Architectures for Networking and Communications Systems. pp. 13–24. doi:10.1109/ANCS.2013.6665172. ISBN 978-1-4799-1641-2. S2CID 12282067.
Kaufmann, Antoine; Peter, SImon; Sharma, Naveen Kr.; Anderson, Thomas; Krishnamurthy, Arvind (2016-03-25). "High Performance Packet Processing with FlexNIC". Proceedings of the Twenty-First International Conference on Architectural Support for Programming Languages and Operating Systems. ASPLOS '16. New York, NY, USA: Association for Computing Machinery. pp. 67–81. doi:10.1145/2872362.2872367. ISBN 978-1-4503-4091-5. S2CID 9625891.

Buono, Daniele; Mencagli, Gabriele (21–25 July 2014). Run-time mechanisms for fine-grained parallelism on network processors: The TILEPro64 experience (PDF). 2014 International Conference on High Performance Computing Simulation (HPCS 2014). Bologna, Italy. pp. 55–64. doi:10.1109/HPCSim.2014.6903669. ISBN 978-1-4799-5313-4. Archived (PDF) from the original on 27 March 2019. Alt URL

Buono, Daniele; Mencagli, Gabriele (21–25 July 2014). Run-time mechanisms for fine-grained parallelism on network processors: The TILEPro64 experience (PDF). 2014 International Conference on High Performance Computing Simulation (HPCS 2014). Bologna, Italy. pp. 55–64. doi:10.1109/HPCSim.2014.6903669. ISBN 978-1-4799-5313-4. Archived (PDF) from the original on 27 March 2019. Alt URL