Mavaddat, F.; Parhami, B. (October 1988). "URISC: The Ultimate Reduced Instruction Set Computer"(PDF). International Journal of Electrical Engineering Education. 25 (4). Manchester University Press: 327–334. doi:10.1177/002072098802500408. S2CID61797084. Retrieved 2010-10-04.
This paper considers "a machine with a single 3-address instruction as the ultimate in RISC design (URISC)". Without giving a name to the instruction, it describes a SBN OISC and its associated assembly language, emphasising that this is a universal (i.e., Turing-complete) machine whose simplicity makes it ideal for classroom use.
Jones, Douglas W. (June 1988). "The Ultimate RISC". ACM SIGARCH Computer Architecture News. 16 (3). New York: ACM: 48–55. doi:10.1145/48675.48683. S2CID9481528. Retrieved 2010-10-04.
"Reduced instruction set computer architectures have attracted considerable interest since 1980. The ultimate RISC architecture presented here is an extreme yet simple illustration of such an architecture. It has only one instruction, move memory to memory, yet it is useful."
Mazonka, Oleg; Tsoutsos, Nektarios Georgios; Maniatakos, Michail (2016), "Cryptoleq: A Heterogeneous Abstract Machine for Encrypted and Unencrypted Computation", IEEE Transactions on Information Forensics and Security, 11 (9): 2123–2138, Bibcode:2016ITIF...11.2123M, doi:10.1109/TIFS.2016.2569062, S2CID261387
Mavaddat, F.; Parhami, B. (October 1988). "URISC: The Ultimate Reduced Instruction Set Computer"(PDF). International Journal of Electrical Engineering Education. 25 (4). Manchester University Press: 327–334. doi:10.1177/002072098802500408. S2CID61797084. Retrieved 2010-10-04.
This paper considers "a machine with a single 3-address instruction as the ultimate in RISC design (URISC)". Without giving a name to the instruction, it describes a SBN OISC and its associated assembly language, emphasising that this is a universal (i.e., Turing-complete) machine whose simplicity makes it ideal for classroom use.
Jones, Douglas W. (June 1988). "The Ultimate RISC". ACM SIGARCH Computer Architecture News. 16 (3). New York: ACM: 48–55. doi:10.1145/48675.48683. S2CID9481528. Retrieved 2010-10-04.
"Reduced instruction set computer architectures have attracted considerable interest since 1980. The ultimate RISC architecture presented here is an extreme yet simple illustration of such an architecture. It has only one instruction, move memory to memory, yet it is useful."
Mazonka, Oleg; Tsoutsos, Nektarios Georgios; Maniatakos, Michail (2016), "Cryptoleq: A Heterogeneous Abstract Machine for Encrypted and Unencrypted Computation", IEEE Transactions on Information Forensics and Security, 11 (9): 2123–2138, Bibcode:2016ITIF...11.2123M, doi:10.1109/TIFS.2016.2569062, S2CID261387
Mavaddat, F.; Parhami, B. (October 1988). "URISC: The Ultimate Reduced Instruction Set Computer"(PDF). International Journal of Electrical Engineering Education. 25 (4). Manchester University Press: 327–334. doi:10.1177/002072098802500408. S2CID61797084. Retrieved 2010-10-04.
This paper considers "a machine with a single 3-address instruction as the ultimate in RISC design (URISC)". Without giving a name to the instruction, it describes a SBN OISC and its associated assembly language, emphasising that this is a universal (i.e., Turing-complete) machine whose simplicity makes it ideal for classroom use.
Jones, Douglas W. (June 1988). "The Ultimate RISC". ACM SIGARCH Computer Architecture News. 16 (3). New York: ACM: 48–55. doi:10.1145/48675.48683. S2CID9481528. Retrieved 2010-10-04.
"Reduced instruction set computer architectures have attracted considerable interest since 1980. The ultimate RISC architecture presented here is an extreme yet simple illustration of such an architecture. It has only one instruction, move memory to memory, yet it is useful."
