One-instruction set computer (English Wikipedia)

Analysis of information sources in references of the Wikipedia article "One-instruction set computer" in English language version.

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arxiv.org (Global: 69th place; English: 59th place)

atw.hu (Global: low place; English: low place)

users.atw.hu

bbc.co.uk (Global: 8th place; English: 10th place)

books.google.com (Global: 3rd place; English: 3rd place)

caamp.info (Global: low place; English: low place)

complex-systems.com (Global: low place; English: low place)

doi.org (Global: 2nd place; English: 2nd place)

  • Mavaddat, F.; Parhami, B. (October 1988). "URISC: The Ultimate Reduced Instruction Set Computer" (PDF). International Journal of Electrical Engineering Education. 25 (4). Manchester University Press: 327–334. doi:10.1177/002072098802500408. S2CID 61797084. Retrieved 2010-10-04. This paper considers "a machine with a single 3-address instruction as the ultimate in RISC design (URISC)". Without giving a name to the instruction, it describes a SBN OISC and its associated assembly language, emphasising that this is a universal (i.e., Turing-complete) machine whose simplicity makes it ideal for classroom use.
  • Z. A. Melzak (1961). "An informal arithmetical approach to computability and computation". Canadian Mathematical Bulletin. 4 (3): 279–293. doi:10.4153/CMB-1961-031-9.
  • Z. A. Melzak (2018-11-20) [September 1961]. "An informal arithmetical approach to computability and computation". Canadian Mathematical Bulletin. 4 (3): 279–293. doi:10.4153/CMB-1961-032-6.
  • J. Lambek (2018-11-20) [September 1961]. "How to program an infinite abacus". Canadian Mathematical Bulletin. 4 (3): 295–302. doi:10.4153/CMB-1961-032-6.
  • Jones, Douglas W. (June 1988). "The Ultimate RISC". ACM SIGARCH Computer Architecture News. 16 (3). New York: ACM: 48–55. doi:10.1145/48675.48683. S2CID 9481528. Retrieved 2010-10-04. "Reduced instruction set computer architectures have attracted considerable interest since 1980. The ultimate RISC architecture presented here is an extreme yet simple illustration of such an architecture. It has only one instruction, move memory to memory, yet it is useful."
  • Mazonka, Oleg; Tsoutsos, Nektarios Georgios; Maniatakos, Michail (2016), "Cryptoleq: A Heterogeneous Abstract Machine for Encrypted and Unencrypted Computation", IEEE Transactions on Information Forensics and Security, 11 (9): 2123–2138, Bibcode:2016ITIF...11.2123M, doi:10.1109/TIFS.2016.2569062, S2CID 261387

esolangs.org (Global: low place; English: low place)

  • "Addleq". Esolang Wiki. Retrieved 2017-09-16.
  • "DJN OISC". Esolang Wiki. Retrieved 2017-09-16.
  • "P1eq". Esolang Wiki. Retrieved 2017-09-16.
  • "Subleq". Esolang Wiki. Retrieved 2017-09-16.

gazetaeao.ru (Global: low place; English: low place)

github.com (Global: 383rd place; English: 320th place)

habr.com (Global: 6,542nd place; English: low place)

harvard.edu (Global: 18th place; English: 17th place)

ui.adsabs.harvard.edu

mazonka.com (Global: low place; English: low place)

  • Mazonka, Oleg (October 2009). "SUBLEQ". Archived from the original on 2017-06-29. Retrieved 2017-09-16.

semanticscholar.org (Global: 11th place; English: 8th place)

api.semanticscholar.org

  • Mavaddat, F.; Parhami, B. (October 1988). "URISC: The Ultimate Reduced Instruction Set Computer" (PDF). International Journal of Electrical Engineering Education. 25 (4). Manchester University Press: 327–334. doi:10.1177/002072098802500408. S2CID 61797084. Retrieved 2010-10-04. This paper considers "a machine with a single 3-address instruction as the ultimate in RISC design (URISC)". Without giving a name to the instruction, it describes a SBN OISC and its associated assembly language, emphasising that this is a universal (i.e., Turing-complete) machine whose simplicity makes it ideal for classroom use.
  • Jones, Douglas W. (June 1988). "The Ultimate RISC". ACM SIGARCH Computer Architecture News. 16 (3). New York: ACM: 48–55. doi:10.1145/48675.48683. S2CID 9481528. Retrieved 2010-10-04. "Reduced instruction set computer architectures have attracted considerable interest since 1980. The ultimate RISC architecture presented here is an extreme yet simple illustration of such an architecture. It has only one instruction, move memory to memory, yet it is useful."
  • Mazonka, Oleg; Tsoutsos, Nektarios Georgios; Maniatakos, Michail (2016), "Cryptoleq: A Heterogeneous Abstract Machine for Encrypted and Unencrypted Computation", IEEE Transactions on Information Forensics and Security, 11 (9): 2123–2138, Bibcode:2016ITIF...11.2123M, doi:10.1109/TIFS.2016.2569062, S2CID 261387

ucsb.edu (Global: 1,115th place; English: 741st place)

ece.ucsb.edu

  • Mavaddat, F.; Parhami, B. (October 1988). "URISC: The Ultimate Reduced Instruction Set Computer" (PDF). International Journal of Electrical Engineering Education. 25 (4). Manchester University Press: 327–334. doi:10.1177/002072098802500408. S2CID 61797084. Retrieved 2010-10-04. This paper considers "a machine with a single 3-address instruction as the ultimate in RISC design (URISC)". Without giving a name to the instruction, it describes a SBN OISC and its associated assembly language, emphasising that this is a universal (i.e., Turing-complete) machine whose simplicity makes it ideal for classroom use.

uiowa.edu (Global: 3,018th place; English: 1,865th place)

cs.uiowa.edu

  • Jones, Douglas W. (June 1988). "The Ultimate RISC". ACM SIGARCH Computer Architecture News. 16 (3). New York: ACM: 48–55. doi:10.1145/48675.48683. S2CID 9481528. Retrieved 2010-10-04. "Reduced instruction set computer architectures have attracted considerable interest since 1980. The ultimate RISC architecture presented here is an extreme yet simple illustration of such an architecture. It has only one instruction, move memory to memory, yet it is useful."

uni-trier.de (Global: 7,690th place; English: low place)

informatik.uni-trier.de

web.archive.org (Global: 1st place; English: 1st place)