Phase-locked loop (English Wikipedia)

Analysis of information sources in references of the Wikipedia article "Phase-locked loop" in English language version.

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7doi.org

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4archive.org

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4semanticscholar.org

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317centurymaths.com

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3web.archive.org

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2worldcat.org

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1uspto.gov

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1uoguelph.ca

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1sxlist.com

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1arxiv.org

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1theiet.org

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1stanford.edu

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1analog.com

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1harvard.edu

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1handle.net

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1spbu.ru

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1ghostarchive.org

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1zenodo.org

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17centurymaths.com (Global: low place; English: low place)

Christiaan Huygens, Horologium Oscillatorium … (Paris, France: F. Muguet, 1673), pages 18–19. From page 18: " … illudque accidit memoratu dignum, … brevi tempore reduceret." ( … and it is worth mentioning, since with two clocks constructed in this form and which we suspend in like manner, truly the cross beam is assigned two fulcrums [i.e., two pendulum clocks were suspended from the same wooden beam]; the motions of the pendulums thus share the opposite swings between the two [clocks], since the two clocks at no time move even a small distance, and the sound of both can be heard clearly together always: for if the innermost part [of one of the clocks] is disturbed with a little help, it will have been restored in a short time by the clocks themselves.) English translation provided by Ian Bruce's translation of Horologium Oscillatorium … , pages 16–17.
Christiaan Huygens, Horologium Oscillatorium … (Paris, France: F. Muguet, 1673), pages 18–19. From page 18: " … illudque accidit memoratu dignum, … brevi tempore reduceret." ( … and it is worth mentioning, since with two clocks constructed in this form and which we suspend in like manner, truly the cross beam is assigned two fulcrums [i.e., two pendulum clocks were suspended from the same wooden beam]; the motions of the pendulums thus share the opposite swings between the two [clocks], since the two clocks at no time move even a small distance, and the sound of both can be heard clearly together always: for if the innermost part [of one of the clocks] is disturbed with a little help, it will have been restored in a short time by the clocks themselves.) English translation provided by Ian Bruce's translation of Horologium Oscillatorium … , pages 16–17.
Christiaan Huygens, Horologium Oscillatorium … (Paris, France: F. Muguet, 1673), pages 18–19. From page 18: " … illudque accidit memoratu dignum, … brevi tempore reduceret." ( … and it is worth mentioning, since with two clocks constructed in this form and which we suspend in like manner, truly the cross beam is assigned two fulcrums [i.e., two pendulum clocks were suspended from the same wooden beam]; the motions of the pendulums thus share the opposite swings between the two [clocks], since the two clocks at no time move even a small distance, and the sound of both can be heard clearly together always: for if the innermost part [of one of the clocks] is disturbed with a little help, it will have been restored in a short time by the clocks themselves.) English translation provided by Ian Bruce's translation of Horologium Oscillatorium … , pages 16–17.

analog.com (Global: low place; English: 8,202^nd place)

Collins, Ian (July 2018). "Phase-Locked Loop (PLL) Fundamentals". Analog Dialogue. 52. Archived from the original on 2018-07-14.

archive.org (Global: 6^th place; English: 6^th place)

Christiaan Huygens, Horologium Oscillatorium … (Paris, France: F. Muguet, 1673), pages 18–19. From page 18: " … illudque accidit memoratu dignum, … brevi tempore reduceret." ( … and it is worth mentioning, since with two clocks constructed in this form and which we suspend in like manner, truly the cross beam is assigned two fulcrums [i.e., two pendulum clocks were suspended from the same wooden beam]; the motions of the pendulums thus share the opposite swings between the two [clocks], since the two clocks at no time move even a small distance, and the sound of both can be heard clearly together always: for if the innermost part [of one of the clocks] is disturbed with a little help, it will have been restored in a short time by the clocks themselves.) English translation provided by Ian Bruce's translation of Horologium Oscillatorium … , pages 16–17.
Christiaan Huygens, Horologium Oscillatorium … (Paris, France: F. Muguet, 1673), pages 18–19. From page 18: " … illudque accidit memoratu dignum, … brevi tempore reduceret." ( … and it is worth mentioning, since with two clocks constructed in this form and which we suspend in like manner, truly the cross beam is assigned two fulcrums [i.e., two pendulum clocks were suspended from the same wooden beam]; the motions of the pendulums thus share the opposite swings between the two [clocks], since the two clocks at no time move even a small distance, and the sound of both can be heard clearly together always: for if the innermost part [of one of the clocks] is disturbed with a little help, it will have been restored in a short time by the clocks themselves.) English translation provided by Ian Bruce's translation of Horologium Oscillatorium … , pages 16–17.
Christiaan Huygens, Horologium Oscillatorium … (Paris, France: F. Muguet, 1673), pages 18–19. From page 18: " … illudque accidit memoratu dignum, … brevi tempore reduceret." ( … and it is worth mentioning, since with two clocks constructed in this form and which we suspend in like manner, truly the cross beam is assigned two fulcrums [i.e., two pendulum clocks were suspended from the same wooden beam]; the motions of the pendulums thus share the opposite swings between the two [clocks], since the two clocks at no time move even a small distance, and the sound of both can be heard clearly together always: for if the innermost part [of one of the clocks] is disturbed with a little help, it will have been restored in a short time by the clocks themselves.) English translation provided by Ian Bruce's translation of Horologium Oscillatorium … , pages 16–17.
E. V. Appleton (1923) "The automatic synchronization of triode oscillators", Proceedings of the Cambridge Philosophical Society, 21 (Part III): 231–248. Available on-line at: Internet Archive.

arxiv.org (Global: 69^th place; English: 59^th place)

Leonov, G. A.; Kuznetsov, N. V.; Yuldashev, M. V.; Yuldashev, R. V. (2015). "Hold-in, pull-in, and lock-in ranges of PLL circuits: rigorous mathematical definitions and limitations of classical theory". IEEE Transactions on Circuits and Systems I: Regular Papers. 62 (10). IEEE: 2454–2464. arXiv:1505.04262. doi:10.1109/TCSI.2015.2476295. S2CID 12292968.

doi.org (Global: 2^nd place; English: 2^nd place)

Grebene, A.; Camenzind, H. (1969). "Phase locking as a new approach for tuned integrated circuits". 1969 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. Vol. XII. pp. 100–101. doi:10.1109/ISSCC.1969.1154749 – via IEEE Xplore.
Leonov, G. A.; Kuznetsov, N. V.; Yuldashev, M. V.; Yuldashev, R. V. (2015). "Hold-in, pull-in, and lock-in ranges of PLL circuits: rigorous mathematical definitions and limitations of classical theory". IEEE Transactions on Circuits and Systems I: Regular Papers. 62 (10). IEEE: 2454–2464. arXiv:1505.04262. doi:10.1109/TCSI.2015.2476295. S2CID 12292968.
Khalili Dermani, M.; Baghaei, M. S.; Colas, Frédéric; Rioual, Michel; Guillaud, Xavier; Retiere, Nicolas (2022). "Non-linear stability analysis of the electrical vehicle chargers power stage connected to the weak grid". CIRED Porto Workshop 2022: E-mobility and power distribution systems. Institution of Engineering and Technology. pp. 955–959. doi:10.1049/icp.2022.0855. ISBN 978-1-83953-705-9. S2CID 251122708.
Dartizio, Simone M.; Tesolin, Francesco; Castoro, Giacomo; Buccoleri, Francesco; Rossoni, Michele; Cherniak, Dmytro; Samori, Carlo; Lacaita, Andrea L.; Levantino, Salvatore (December 2023). "A Low-Spur and Low-Jitter Fractional- N Digital PLL Based on an Inverse-Constant-Slope DTC and FCW Subtractive Dithering". IEEE Journal of Solid-State Circuits. 58 (12): 3320–3337. Bibcode:2023IJSSC..58.3320D. doi:10.1109/JSSC.2023.3311681. hdl:11311/1259046. ISSN 0018-9200.
Razavi, Behzad (Fall 2019). "The Ring Oscillator [A Circuit for All Seasons]". IEEE Solid-State Circuits Magazine. 11 (4): 10–81. doi:10.1109/MSSC.2019.2939771. ISSN 1943-0582.
G. A. Leonov, N. V. Kuznetsov, M. V. Yuldashev, R. V. Yuldashev; Kuznetsov; Yuldashev; Yuldashev (2012). "Analytical method for computation of phase-detector characteristic" (PDF). IEEE Transactions on Circuits and Systems II: Express Briefs. 59 (10): 633–637. doi:10.1109/TCSII.2012.2213362. S2CID 2405056. Archived (PDF) from the original on 2022-10-09.{{cite journal}}: CS1 maint: multiple names: authors list (link)
N.V. Kuznetsov, G.A. Leonov, M.V. Yuldashev, R.V. Yuldashev; Leonov; Yuldashev; Yuldashev (2011). "Analytical methods for computation of phase-detector characteristics and PLL design". ISSCS 2011 - International Symposium on Signals, Circuits and Systems. pp. 7–10. doi:10.1109/ISSCS.2011.5978639. ISBN 978-1-61284-944-7. S2CID 30208667.{{cite book}}: CS1 maint: multiple names: authors list (link)

ghostarchive.org (Global: 32^nd place; English: 21^st place)

G. A. Leonov, N. V. Kuznetsov, M. V. Yuldashev, R. V. Yuldashev; Kuznetsov; Yuldashev; Yuldashev (2012). "Analytical method for computation of phase-detector characteristic" (PDF). IEEE Transactions on Circuits and Systems II: Express Briefs. 59 (10): 633–637. doi:10.1109/TCSII.2012.2213362. S2CID 2405056. Archived (PDF) from the original on 2022-10-09.{{cite journal}}: CS1 maint: multiple names: authors list (link)

handle.net (Global: 102^nd place; English: 76^th place)

hdl.handle.net

Dartizio, Simone M.; Tesolin, Francesco; Castoro, Giacomo; Buccoleri, Francesco; Rossoni, Michele; Cherniak, Dmytro; Samori, Carlo; Lacaita, Andrea L.; Levantino, Salvatore (December 2023). "A Low-Spur and Low-Jitter Fractional- N Digital PLL Based on an Inverse-Constant-Slope DTC and FCW Subtractive Dithering". IEEE Journal of Solid-State Circuits. 58 (12): 3320–3337. Bibcode:2023IJSSC..58.3320D. doi:10.1109/JSSC.2023.3311681. hdl:11311/1259046. ISSN 0018-9200.

harvard.edu (Global: 18^th place; English: 17^th place)

ui.adsabs.harvard.edu

Dartizio, Simone M.; Tesolin, Francesco; Castoro, Giacomo; Buccoleri, Francesco; Rossoni, Michele; Cherniak, Dmytro; Samori, Carlo; Lacaita, Andrea L.; Levantino, Salvatore (December 2023). "A Low-Spur and Low-Jitter Fractional- N Digital PLL Based on an Inverse-Constant-Slope DTC and FCW Subtractive Dithering". IEEE Journal of Solid-State Circuits. 58 (12): 3320–3337. Bibcode:2023IJSSC..58.3320D. doi:10.1109/JSSC.2023.3311681. hdl:11311/1259046. ISSN 0018-9200.

semanticscholar.org (Global: 11^th place; English: 8^th place)

api.semanticscholar.org

Leonov, G. A.; Kuznetsov, N. V.; Yuldashev, M. V.; Yuldashev, R. V. (2015). "Hold-in, pull-in, and lock-in ranges of PLL circuits: rigorous mathematical definitions and limitations of classical theory". IEEE Transactions on Circuits and Systems I: Regular Papers. 62 (10). IEEE: 2454–2464. arXiv:1505.04262. doi:10.1109/TCSI.2015.2476295. S2CID 12292968.
Khalili Dermani, M.; Baghaei, M. S.; Colas, Frédéric; Rioual, Michel; Guillaud, Xavier; Retiere, Nicolas (2022). "Non-linear stability analysis of the electrical vehicle chargers power stage connected to the weak grid". CIRED Porto Workshop 2022: E-mobility and power distribution systems. Institution of Engineering and Technology. pp. 955–959. doi:10.1049/icp.2022.0855. ISBN 978-1-83953-705-9. S2CID 251122708.
G. A. Leonov, N. V. Kuznetsov, M. V. Yuldashev, R. V. Yuldashev; Kuznetsov; Yuldashev; Yuldashev (2012). "Analytical method for computation of phase-detector characteristic" (PDF). IEEE Transactions on Circuits and Systems II: Express Briefs. 59 (10): 633–637. doi:10.1109/TCSII.2012.2213362. S2CID 2405056. Archived (PDF) from the original on 2022-10-09.{{cite journal}}: CS1 maint: multiple names: authors list (link)
N.V. Kuznetsov, G.A. Leonov, M.V. Yuldashev, R.V. Yuldashev; Leonov; Yuldashev; Yuldashev (2011). "Analytical methods for computation of phase-detector characteristics and PLL design". ISSCS 2011 - International Symposium on Signals, Circuits and Systems. pp. 7–10. doi:10.1109/ISSCS.2011.5978639. ISBN 978-1-61284-944-7. S2CID 30208667.{{cite book}}: CS1 maint: multiple names: authors list (link)

spbu.ru (Global: 4,117^th place; English: low place)

math.spbu.ru

G. A. Leonov, N. V. Kuznetsov, M. V. Yuldashev, R. V. Yuldashev; Kuznetsov; Yuldashev; Yuldashev (2012). "Analytical method for computation of phase-detector characteristic" (PDF). IEEE Transactions on Circuits and Systems II: Express Briefs. 59 (10): 633–637. doi:10.1109/TCSII.2012.2213362. S2CID 2405056. Archived (PDF) from the original on 2022-10-09.{{cite journal}}: CS1 maint: multiple names: authors list (link)

stanford.edu (Global: 179^th place; English: 183^rd place)

www-vlsi.stanford.edu

M Horowitz; C. Yang; S. Sidiropoulos (1998-01-01). "High-speed electrical signaling: overview and limitations" (PDF). IEEE Micro. Archived from the original (PDF) on 2006-02-21.

sxlist.com (Global: low place; English: low place)

"National Television Systems Committee Video Display Signal IO". Sxlist.com. Retrieved 2010-10-14.

theiet.org (Global: 8,663^rd place; English: 5,646^th place)

digital-library.theiet.org

Khalili Dermani, M.; Baghaei, M. S.; Colas, Frédéric; Rioual, Michel; Guillaud, Xavier; Retiere, Nicolas (2022). "Non-linear stability analysis of the electrical vehicle chargers power stage connected to the weak grid". CIRED Porto Workshop 2022: E-mobility and power distribution systems. Institution of Engineering and Technology. pp. 955–959. doi:10.1049/icp.2022.0855. ISBN 978-1-83953-705-9. S2CID 251122708.

uoguelph.ca (Global: low place; English: 7,605^th place)

Notes for a University of Guelph course describing the PLL and early history, including an IC PLL tutorial Archived 2009-02-24 at the Wayback Machine

uspto.gov (Global: 1,459^th place; English: 991^st place)

patimg1.uspto.gov

See also: French patent no. 635,451 (filed: 6 October 1931; issued: 29 September 1932); and U.S. patent "Synchronizing system", no. 1,990,428 (filed: 29 September 1932; issued: 5 February 1935).

web.archive.org (Global: 1^st place; English: 1^st place)

Notes for a University of Guelph course describing the PLL and early history, including an IC PLL tutorial Archived 2009-02-24 at the Wayback Machine
M Horowitz; C. Yang; S. Sidiropoulos (1998-01-01). "High-speed electrical signaling: overview and limitations" (PDF). IEEE Micro. Archived from the original (PDF) on 2006-02-21.
Collins, Ian (July 2018). "Phase-Locked Loop (PLL) Fundamentals". Analog Dialogue. 52. Archived from the original on 2018-07-14.

worldcat.org (Global: 5^th place; English: 5^th place)

search.worldcat.org

Dartizio, Simone M.; Tesolin, Francesco; Castoro, Giacomo; Buccoleri, Francesco; Rossoni, Michele; Cherniak, Dmytro; Samori, Carlo; Lacaita, Andrea L.; Levantino, Salvatore (December 2023). "A Low-Spur and Low-Jitter Fractional- N Digital PLL Based on an Inverse-Constant-Slope DTC and FCW Subtractive Dithering". IEEE Journal of Solid-State Circuits. 58 (12): 3320–3337. Bibcode:2023IJSSC..58.3320D. doi:10.1109/JSSC.2023.3311681. hdl:11311/1259046. ISSN 0018-9200.
Razavi, Behzad (Fall 2019). "The Ring Oscillator [A Circuit for All Seasons]". IEEE Solid-State Circuits Magazine. 11 (4): 10–81. doi:10.1109/MSSC.2019.2939771. ISSN 1943-0582.

zenodo.org (Global: 621^st place; English: 380^th place)

N.V. Kuznetsov, G.A. Leonov, M.V. Yuldashev, R.V. Yuldashev; Leonov; Yuldashev; Yuldashev (2011). "Analytical methods for computation of phase-detector characteristics and PLL design". ISSCS 2011 - International Symposium on Signals, Circuits and Systems. pp. 7–10. doi:10.1109/ISSCS.2011.5978639. ISBN 978-1-61284-944-7. S2CID 30208667.{{cite book}}: CS1 maint: multiple names: authors list (link)

Phase-locked loop (English Wikipedia)

17centurymaths.com (Global: low place; English: low place)

analog.com (Global: low place; English: 8,202nd place)

archive.org (Global: 6th place; English: 6th place)

arxiv.org (Global: 69th place; English: 59th place)

doi.org (Global: 2nd place; English: 2nd place)

ghostarchive.org (Global: 32nd place; English: 21st place)

handle.net (Global: 102nd place; English: 76th place)

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harvard.edu (Global: 18th place; English: 17th place)

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semanticscholar.org (Global: 11th place; English: 8th place)

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spbu.ru (Global: 4,117th place; English: low place)

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stanford.edu (Global: 179th place; English: 183rd place)

www-vlsi.stanford.edu

sxlist.com (Global: low place; English: low place)

theiet.org (Global: 8,663rd place; English: 5,646th place)

digital-library.theiet.org

uoguelph.ca (Global: low place; English: 7,605th place)

uspto.gov (Global: 1,459th place; English: 991st place)

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web.archive.org (Global: 1st place; English: 1st place)

worldcat.org (Global: 5th place; English: 5th place)

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zenodo.org (Global: 621st place; English: 380th place)

analog.com (Global: low place; English: 8,202^nd place)

archive.org (Global: 6^th place; English: 6^th place)

arxiv.org (Global: 69^th place; English: 59^th place)

doi.org (Global: 2^nd place; English: 2^nd place)

ghostarchive.org (Global: 32^nd place; English: 21^st place)

handle.net (Global: 102^nd place; English: 76^th place)

harvard.edu (Global: 18^th place; English: 17^th place)

semanticscholar.org (Global: 11^th place; English: 8^th place)

spbu.ru (Global: 4,117^th place; English: low place)

stanford.edu (Global: 179^th place; English: 183^rd place)

theiet.org (Global: 8,663^rd place; English: 5,646^th place)

uoguelph.ca (Global: low place; English: 7,605^th place)

uspto.gov (Global: 1,459^th place; English: 991^st place)

web.archive.org (Global: 1^st place; English: 1^st place)

worldcat.org (Global: 5^th place; English: 5^th place)

zenodo.org (Global: 621^st place; English: 380^th place)