Polysilicon depletion effect (English Wikipedia)

Analysis of information sources in references of the Wikipedia article "Polysilicon depletion effect" in English language version.

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Schuegraf, K.F.; King, C.C.; Hu, C. (1993). "Impact of polysilicon depletion in thin oxide MOS technology" (PDF). Proceedings International Symposium: VLSI Technology Systems and Applications. pp. 86–90.

Rios, R.; Arora, N.D. (1994). "An analytic polysilicon depletion effect model for MOSFETs". IEEE Electron Device Letters. 15 (4): 129–131. doi:10.1109/55.285407. S2CID 9878129.
Rios, R.; Arora, N.D. (1994). "Modeling the polysilicon depletion effect and its impact on submicrometer CMOS circuit performance". IEEE Transactions on Electron Devices. 42 (5): 935–943. doi:10.1109/16.381991.
Hobbs, C.C.; Fonseca, L. R. C.; Knizhnik, A. (2004). "Fermi-level pinning at the polysilicon/metal oxide interface-Part I". IEEE Transactions on Electron Devices. 51 (6): 971–977. doi:10.1109/TED.2004.829513. S2CID 45952996.

"Global Foundries". Archived from the original on 2013-05-09. Retrieved 2012-03-28.

"From Sand to Silicon: The Making of Chip" (Press release). Intel Technology. Nov 11, 2011. Retrieved 2013-06-08.

Chau, Robert (Nov 6, 2003). "Gate Dielectric Scaling for CMOS: from SiO₂/PolySi to High-K/Metal-Gate" (White paper) (Press release). Intel Technology. Retrieved 2013-06-08.

Rios, R.; Arora, N.D. (1994). "An analytic polysilicon depletion effect model for MOSFETs". IEEE Electron Device Letters. 15 (4): 129–131. doi:10.1109/55.285407. S2CID 9878129.
Hobbs, C.C.; Fonseca, L. R. C.; Knizhnik, A. (2004). "Fermi-level pinning at the polysilicon/metal oxide interface-Part I". IEEE Transactions on Electron Devices. 51 (6): 971–977. doi:10.1109/TED.2004.829513. S2CID 45952996.