Processor power dissipation (English Wikipedia)

Analysis of information sources in references of the Wikipedia article "Processor power dissipation" in English language version.

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3doi.org

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2semanticscholar.org

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2intel.com

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1microsoft.com

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1arstechnica.com

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1arxiv.org

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1northwestern.edu

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1psu.edu

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1eetimes.com

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anandtech.com

Cutress, Ian (2012-04-23). "Undervolting and Overclocking on Ivy Bridge". anandtech.com.

arstechnica.com

Cunningham, Andrew (2013-01-14). "The technical details behind Intel's 7 Watt Ivy Bridge CPUs". Ars Technica. Retrieved 2013-01-14. In Intel's case, a specified chip's TDP has less to do with the amount of power a chip needs to use (or can use) and more to do with the amount of power the computer's fan and heatsink need to be able to dissipate while the chip is under sustained load. Actual power usage can be higher or (much) lower than TDP, but the figure is intended to give guidance to engineers designing cooling solutions for their products.

arxiv.org

De Vogeleer, Karel; Memmi, Gerard; Jouvelot, Pierre; Coelho, Fabien (2013-09-09). "The Energy/Frequency Convexity Rule: Modeling and Experimental Validation on Mobile Devices". arXiv:1401.4655 [cs.OH].

books.google.com

Jan M. Rabaey; Massoud Pedram; editors. "Low Power Design Methodologies". 2012. p. 133.

doi.org

Basu, K.; Choudhary, A.; Pisharath, J.; Kandemir, M. (2002). "Power protocol: Reducing power dissipation on off-chip data buses". 35th Annual IEEE/ACM International Symposium on Microarchitecture, 2002. (MICRO-35). Proceedings (PDF). pp. 345–355. CiteSeerX 10.1.1.115.9946. doi:10.1109/MICRO.2002.1176262. ISBN 978-0-7695-1859-6. S2CID 18811466.
K. Moiseev, A. Kolodny and S. Wimer (September 2008). "Timing-aware power-optimal ordering of signals". ACM Transactions on Design Automation of Electronic Systems. 13 (4): 1–17. doi:10.1145/1391962.1391973. S2CID 18895687.
Al-Khatib, Zaid; Abdi, Samar (2015-04-13). "Operand-Value-Based Modeling of Dynamic Energy Consumption of Soft Processors in FPGA". Applied Reconfigurable Computing. Lecture Notes in Computer Science. Vol. 9040. Springer, Cham. pp. 65–76. doi:10.1007/978-3-319-16214-0_6. ISBN 978-3-319-16213-3.

eetimes.com

Johnson, R. Colin (2011-08-18). "IBM demos cognitive computer chips". EE Times. Retrieved 2011-10-01.

gotw.ca

Sutter, Herb (2005). "The Free Lunch Is Over: A Fundamental Turn Toward Concurrency in Software". Dr. Dobb's Journal. 30 (3).

intel.com

download.intel.com

"Enhanced Intel SpeedStep Technology for the Intel Pentium M Processor (White Paper)" (PDF). Intel Corporation. March 2004. Archived (PDF) from the original on 2015-08-12. Retrieved 2013-12-21.

intel.com

"Frequently Asked Questions About Temperature for Intel® Processors".

microsoft.com

Zhang, Yifan; Liu, Yunxin; Zhuang, Li; Liu, Xuanzhe; Zhao, Feng; Li, Qun. Accurate CPU Power Modeling for Multicore Smartphones (Report). Microsoft Research. MSR-TR-2015-9.

northwestern.edu

cucis.eecs.northwestern.edu

Basu, K.; Choudhary, A.; Pisharath, J.; Kandemir, M. (2002). "Power protocol: Reducing power dissipation on off-chip data buses". 35th Annual IEEE/ACM International Symposium on Microarchitecture, 2002. (MICRO-35). Proceedings (PDF). pp. 345–355. CiteSeerX 10.1.1.115.9946. doi:10.1109/MICRO.2002.1176262. ISBN 978-0-7695-1859-6. S2CID 18811466.

psu.edu

citeseerx.ist.psu.edu

Basu, K.; Choudhary, A.; Pisharath, J.; Kandemir, M. (2002). "Power protocol: Reducing power dissipation on off-chip data buses". 35th Annual IEEE/ACM International Symposium on Microarchitecture, 2002. (MICRO-35). Proceedings (PDF). pp. 345–355. CiteSeerX 10.1.1.115.9946. doi:10.1109/MICRO.2002.1176262. ISBN 978-0-7695-1859-6. S2CID 18811466.

scarpaz.com

Su, Ching-Long; Tsui, Chi-Ying; Despain, Alvin M. (1994). Low Power Architecture Design and Compilation Techniques for High-Performance Processors (PDF) (Report). Advanced Computer Architecture Laboratory. ACAL-TR-94-01.

semanticscholar.org

api.semanticscholar.org

Basu, K.; Choudhary, A.; Pisharath, J.; Kandemir, M. (2002). "Power protocol: Reducing power dissipation on off-chip data buses". 35th Annual IEEE/ACM International Symposium on Microarchitecture, 2002. (MICRO-35). Proceedings (PDF). pp. 345–355. CiteSeerX 10.1.1.115.9946. doi:10.1109/MICRO.2002.1176262. ISBN 978-0-7695-1859-6. S2CID 18811466.
K. Moiseev, A. Kolodny and S. Wimer (September 2008). "Timing-aware power-optimal ordering of signals". ACM Transactions on Design Automation of Electronic Systems. 13 (4): 1–17. doi:10.1145/1391962.1391973. S2CID 18895687.

silentpcreview.com

Chin, Mike (2004-06-15). "Athlon 64 for Quiet Power". silentpcreview.com. p. 3. Retrieved 2013-12-21. Thermal Design Power (TDP) should be used for processor thermal solution design targets. The TDP is not the maximum power that the processor can dissipate.

web.archive.org

"Enhanced Intel SpeedStep Technology for the Intel Pentium M Processor (White Paper)" (PDF). Intel Corporation. March 2004. Archived (PDF) from the original on 2015-08-12. Retrieved 2013-12-21.