Random-access memory (English Wikipedia)

Agarwal, Vikas; Hrishikesh, M. S.; Keckler, Stephen W.; Burger, Doug (June 10–14, 2000). "Clock Rate versus IPC: The End of the Road for Conventional Microarchitectures" (PDF). Proceedings of the 27th Annual International Symposium on Computer Architecture. 27th Annual International Symposium on Computer Architecture. Vancouver, BC. Retrieved 14 July 2018.

anandtech.com

Shilov, Anton (March 29, 2016). "Micron Begins to Sample GDDR5X Memory, Unveils Specs of Chips". AnandTech. Retrieved 16 July 2019.
Shilov, Anton (July 19, 2017). "Samsung Increases Production Volumes of 8 GB HBM2 Chips Due to Growing Demand". AnandTech. Retrieved 29 June 2019.

archive.org

NEC Application Specific Memory. NEC. Fall 1995. p. 359. Retrieved 21 June 2019.

arstechnica.com

Gallagher, Sean (April 4, 2013). "Memory that never forgets: non-volatile DIMMs hit the market". Ars Technica. Archived from the original on July 8, 2017.

az5miao.com

"History: 2000s". az5miao. Retrieved 4 April 2022.
"History: 2010s". az5miao. Retrieved 4 April 2022.

bitsavers.org

Memory Data Book And Designers Guide (PDF). Mostek. March 1979. pp. 9 & 183.

books.google.com

Solid State Design – Vol. 6. Horizon House. 1965.
Lojek, Bo (2007). History of Semiconductor Engineering. Springer Science & Business Media. pp. 362–363. ISBN 9783540342588. The i1103 was manufactured on a 6-mask silicon-gate P-MOS process with 8 μm minimum features. The resulting product had a 2,400 μm² memory cell size, a die size just under 10 mm², and sold for around $21.
"Electronic Design". Electronic Design. 41 (15–21). Hayden Publishing Company. 1993. The first commercial synchronous DRAM, the Samsung 16-Mbit KM48SL2000, employs a single-bank architecture that lets system designers easily transition from asynchronous to synchronous systems.
Rainer Waser (2012). Nanoelectronics and Information Technology. John Wiley & Sons. p. 790. ISBN 9783527409273. Archived from the original on August 1, 2016. Retrieved March 31, 2014.
Chris Jesshope and Colin Egan (2006). Advances in Computer Systems Architecture: 11th Asia-Pacific Conference, ACSAC 2006, Shanghai, China, September 6-8, 2006, Proceedings. Springer. p. 109. ISBN 9783540400561. Archived from the original on August 1, 2016. Retrieved March 31, 2014.
Ahmed Amine Jerraya and Wayne Wolf (2005). Multiprocessor Systems-on-chips. Morgan Kaufmann. pp. 90–91. ISBN 9780123852519. Archived from the original on August 1, 2016. Retrieved March 31, 2014.
Celso C. Ribeiro and Simone L. Martins (2004). Experimental and Efficient Algorithms: Third International Workshop, WEA 2004, Angra Dos Reis, Brazil, May 25-28, 2004, Proceedings, Volume 3. Springer. p. 529. ISBN 9783540220671. Archived from the original on August 1, 2016. Retrieved March 31, 2014.
Pimbley, J. (2012). Advanced CMOS Process Technology. Elsevier. p. 7. ISBN 9780323156806.
"Japanese Technical Abstracts". Japanese Technical Abstracts. 2 (3–4). University Microfilms: 161. 1987. The announcement of 1M DRAM in 1984 began the era of megabytes.
"Fine CMOS techniques create 1M VSRAM". Japanese Technical Abstracts. 2 (3–4). University Microfilms: 161. 1987.
Scott, J.F. (2003). "Nano-Ferroelectrics". In Tsakalakos, Thomas; Ovid'ko, Ilya A.; Vasudevan, Asuri K. (eds.). Nanostructures: Synthesis, Functional Properties and Application. Springer Science & Business Media. pp. 584–600 (597). ISBN 9789400710191.

britannica.com

"Robert Dennard". Encyclopedia Britannica. Retrieved 8 July 2019.

cambridge.org

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"RAM". Cambridge English Dictionary. Retrieved 11 July 2019.

computer.org

"Famous Graphics Chips: TI TMS34010 and VRAM". IEEE Computer Society. 10 January 2019. Retrieved 29 June 2019.

computer50.org

Napper, Brian, Computer 50: The University of Manchester Celebrates the Birth of the Modern Computer, archived from the original on 4 May 2012, retrieved 26 May 2012
Williams, F. C.; Kilburn, T.; Tootill, G. C. (Feb 1951), "Universal High-Speed Digital Computers: A Small-Scale Experimental Machine", Proc. IEE, 98 (61): 13–28, doi:10.1049/pi-2.1951.0004, archived from the original on 2013-11-17.

computerhistory.org

"1966: Semiconductor RAMs Serve High-speed Storage Needs". Computer History Museum.
"1970: Semiconductors compete with magnetic cores". Computer History Museum. Retrieved 19 June 2019.
"1966: Semiconductor RAMs Serve High-speed Storage Needs". Computer History Museum. Retrieved 19 June 2019.
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"1968: Silicon Gate Technology Developed for ICs". Computer History Museum. Retrieved 10 August 2019.
"1966: Semiconductor RAMs Serve High-speed Storage Needs". Computer History Museum.
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console5.com

"μPD41264 256K Dual Port Graphics Buffer" (PDF). NEC Electronics. Retrieved 21 June 2019.

core.ac.uk

Gealow, Jeffrey Carl (10 August 1990). "Impact of Processing Technology on DRAM Sense Amplifier Design" (PDF). Massachusetts Institute of Technology. pp. 149–166. Retrieved 25 June 2019 – via CORE.

datasheet.directory

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datasheetarchive.com

"KM48SL2000-7 Datasheet". Samsung. August 1992. Retrieved 19 June 2019.
"KM48SL2000-7 Datasheet". Samsung. August 1992. Retrieved 19 June 2019.
HM5283206 Datasheet. Hitachi. 11 November 1994. Retrieved 10 July 2019.
μPD481850 Datasheet. NEC. 6 December 1994. Retrieved 10 July 2019.
UPD4811650 Datasheet. NEC. December 1997. Retrieved 10 July 2019.
Takeuchi, Kei (1998). "16M-BIT SYNCHRONOUS GRAPHICS RAM: μPD4811650". NEC Device Technology International (48). Retrieved 10 July 2019.
"K4D553238F Datasheet". Samsung Electronics. March 2005. Retrieved 10 July 2019.

dejazzer.com

Sah, Chih-Tang (October 1988). "Evolution of the MOS transistor-from conception to VLSI" (PDF). Proceedings of the IEEE. 76 (10): 1280–1326 (1303). Bibcode:1988IEEEP..76.1280S. doi:10.1109/5.16328. ISSN 0018-9219.

digitaltrends.com

Coppock, Mark (31 January 2017). "If you're buying or upgrading your PC, expect to pay more for RAM". www.digitaltrends.com. Retrieved 2019-03-28.

doi.org

Williams, F. C.; Kilburn, T. (Sep 1948), "Electronic Digital Computers", Nature, 162 (4117): 487, Bibcode:1948Natur.162..487W, doi:10.1038/162487a0, S2CID 4110351. Reprinted in The Origins of Digital Computers.
Williams, F. C.; Kilburn, T.; Tootill, G. C. (Feb 1951), "Universal High-Speed Digital Computers: A Small-Scale Experimental Machine", Proc. IEE, 98 (61): 13–28, doi:10.1049/pi-2.1951.0004, archived from the original on 2013-11-17.
Sah, Chih-Tang (October 1988). "Evolution of the MOS transistor-from conception to VLSI" (PDF). Proceedings of the IEEE. 76 (10): 1280–1326 (1303). Bibcode:1988IEEEP..76.1280S. doi:10.1109/5.16328. ISSN 0018-9219.
Isobe, Mitsuo; Uchida, Yukimasa; Maeguchi, Kenji; Mochizuki, T.; Kimura, M.; Hatano, H.; Mizutani, Y.; Tango, H. (October 1981). "An 18 ns CMOS/SOS 4K static RAM". IEEE Journal of Solid-State Circuits. 16 (5): 460–465. Bibcode:1981IJSSC..16..460I. doi:10.1109/JSSC.1981.1051623. S2CID 12992820.
Yoshimoto, M.; Anami, K.; Shinohara, H.; Yoshihara, T.; Takagi, H.; Nagao, S.; Kayano, S.; Nakano, T. (1983). "A 64Kb full CMOS RAM with divided word line structure". 1983 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. Vol. XXVI. pp. 58–59. doi:10.1109/ISSCC.1983.1156503. S2CID 34837669.
Havemann, Robert H.; Eklund, R. E.; Tran, Hiep V.; Haken, R. A.; Scott, D. B.; Fung, P. K.; Ham, T. E.; Favreau, D. P.; Virkus, R. L. (December 1987). "An 0.8 μm 256K BiCMOS SRAM technology". 1987 International Electron Devices Meeting. pp. 841–843. doi:10.1109/IEDM.1987.191564. S2CID 40375699.
Shahidi, Ghavam G.; Davari, Bijan; Dennard, Robert H.; Anderson, C. A.; Chappell, B. A.; et al. (December 1994). "A room temperature 0.1 μm CMOS on SOI". IEEE Transactions on Electron Devices. 41 (12): 2405–2412. Bibcode:1994ITED...41.2405S. doi:10.1109/16.337456. S2CID 108832941.
Robinson, Arthur L. (11 May 1984). "Experimental Memory Chips Reach 1 Megabit: As they become larger, memories become an increasingly important part of the integrated circuit business, technologically and economically". Science. 224 (4649): 590–592. doi:10.1126/science.224.4649.590. ISSN 0036-8075. PMID 17838349.
Hanafi, Hussein I.; Lu, Nicky C. C.; Chao, H. H.; Hwang, Wei; Henkels, W. H.; Rajeevakumar, T. V.; Terman, L. M.; Franch, Robert L. (October 1988). "A 20-ns 128-kbit*4 high speed DRAM with 330-Mbit/s data rate". IEEE Journal of Solid-State Circuits. 23 (5): 1140–1149. Bibcode:1988IJSSC..23.1140L. doi:10.1109/4.5936.

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espacenet.com

worldwide.espacenet.com

US patent 3562721, Robert H. Norman, "Solid State Switching and Memory Apparatus", published 9 February1971

fulviofrisone.com

Sze, Simon M. (2002). Semiconductor Devices: Physics and Technology (PDF) (2nd ed.). Wiley. p. 214. ISBN 0-471-33372-7.

hardwarehell.com

"Shadow Ram". Archived from the original on 2006-10-29. Retrieved 2007-07-24.

harvard.edu

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Williams, F. C.; Kilburn, T. (Sep 1948), "Electronic Digital Computers", Nature, 162 (4117): 487, Bibcode:1948Natur.162..487W, doi:10.1038/162487a0, S2CID 4110351. Reprinted in The Origins of Digital Computers.
Sah, Chih-Tang (October 1988). "Evolution of the MOS transistor-from conception to VLSI" (PDF). Proceedings of the IEEE. 76 (10): 1280–1326 (1303). Bibcode:1988IEEEP..76.1280S. doi:10.1109/5.16328. ISSN 0018-9219.
Isobe, Mitsuo; Uchida, Yukimasa; Maeguchi, Kenji; Mochizuki, T.; Kimura, M.; Hatano, H.; Mizutani, Y.; Tango, H. (October 1981). "An 18 ns CMOS/SOS 4K static RAM". IEEE Journal of Solid-State Circuits. 16 (5): 460–465. Bibcode:1981IJSSC..16..460I. doi:10.1109/JSSC.1981.1051623. S2CID 12992820.
Shahidi, Ghavam G.; Davari, Bijan; Dennard, Robert H.; Anderson, C. A.; Chappell, B. A.; et al. (December 1994). "A room temperature 0.1 μm CMOS on SOI". IEEE Transactions on Electron Devices. 41 (12): 2405–2412. Bibcode:1994ITED...41.2405S. doi:10.1109/16.337456. S2CID 108832941.
Hanafi, Hussein I.; Lu, Nicky C. C.; Chao, H. H.; Hwang, Wei; Henkels, W. H.; Rajeevakumar, T. V.; Terman, L. M.; Franch, Robert L. (October 1988). "A 20-ns 128-kbit*4 high speed DRAM with 330-Mbit/s data rate". IEEE Journal of Solid-State Circuits. 23 (5): 1140–1149. Bibcode:1988IJSSC..23.1140L. doi:10.1109/4.5936.

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pubmed.ncbi.nlm.nih.gov

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oldcalculatormuseum.com

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Toshiba "Toscal" BC-1411 Desktop Calculator Archived 2007-05-20 at the Wayback Machine

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"Sense amplifier circuit for switching plural inputs at low power". Google Patents. Retrieved 21 June 2019.

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retrocdn.net

"MSM5718C50/MD5764802" (PDF). Oki Semiconductor. February 1999. Archived (PDF) from the original on 2019-06-21. Retrieved 21 June 2019.
"Direct RDRAM" (PDF). Rambus. 12 March 1998. Archived (PDF) from the original on 2019-06-21. Retrieved 21 June 2019.

samsung.com

"Samsung Electronics Develops First 128Mb SDRAM with DDR/SDR Manufacturing Option". Samsung Electronics. Samsung. 10 February 1999. Retrieved 23 June 2019.
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"Samsung Electronics Announces Industry's First 8Gb LPDDR5 DRAM for 5G and AI-powered Mobile Applications". Samsung. July 17, 2018. Retrieved 8 July 2019.
"Samsung Electronics Starts Producing Industry's First 16-Gigabit GDDR6 for Advanced Graphics Systems". Samsung. January 18, 2018. Retrieved 15 July 2019.

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sciencemuseum.org.uk

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Toscal BC-1411 calculator. Archived 2017-07-29 at the Wayback Machine, Science Museum, London.

semanticscholar.org

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Williams, F. C.; Kilburn, T. (Sep 1948), "Electronic Digital Computers", Nature, 162 (4117): 487, Bibcode:1948Natur.162..487W, doi:10.1038/162487a0, S2CID 4110351. Reprinted in The Origins of Digital Computers.
Isobe, Mitsuo; Uchida, Yukimasa; Maeguchi, Kenji; Mochizuki, T.; Kimura, M.; Hatano, H.; Mizutani, Y.; Tango, H. (October 1981). "An 18 ns CMOS/SOS 4K static RAM". IEEE Journal of Solid-State Circuits. 16 (5): 460–465. Bibcode:1981IJSSC..16..460I. doi:10.1109/JSSC.1981.1051623. S2CID 12992820.
Yoshimoto, M.; Anami, K.; Shinohara, H.; Yoshihara, T.; Takagi, H.; Nagao, S.; Kayano, S.; Nakano, T. (1983). "A 64Kb full CMOS RAM with divided word line structure". 1983 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. Vol. XXVI. pp. 58–59. doi:10.1109/ISSCC.1983.1156503. S2CID 34837669.
Havemann, Robert H.; Eklund, R. E.; Tran, Hiep V.; Haken, R. A.; Scott, D. B.; Fung, P. K.; Ham, T. E.; Favreau, D. P.; Virkus, R. L. (December 1987). "An 0.8 μm 256K BiCMOS SRAM technology". 1987 International Electron Devices Meeting. pp. 841–843. doi:10.1109/IEDM.1987.191564. S2CID 40375699.
Shahidi, Ghavam G.; Davari, Bijan; Dennard, Robert H.; Anderson, C. A.; Chappell, B. A.; et al. (December 1994). "A room temperature 0.1 μm CMOS on SOI". IEEE Transactions on Electron Devices. 41 (12): 2405–2412. Bibcode:1994ITED...41.2405S. doi:10.1109/16.337456. S2CID 108832941.

shmj.or.jp

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"IBM Archives -- FAQ's for Products and Services". ibm.com. Archived from the original on 2012-10-23.
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"Platform 2015: Intel Processor and Platform Evolution for the Next Decade" (PDF). March 2, 2005. Archived (PDF) from the original on April 27, 2011.
Rainer Waser (2012). Nanoelectronics and Information Technology. John Wiley & Sons. p. 790. ISBN 9783527409273. Archived from the original on August 1, 2016. Retrieved March 31, 2014.
Chris Jesshope and Colin Egan (2006). Advances in Computer Systems Architecture: 11th Asia-Pacific Conference, ACSAC 2006, Shanghai, China, September 6-8, 2006, Proceedings. Springer. p. 109. ISBN 9783540400561. Archived from the original on August 1, 2016. Retrieved March 31, 2014.
Ahmed Amine Jerraya and Wayne Wolf (2005). Multiprocessor Systems-on-chips. Morgan Kaufmann. pp. 90–91. ISBN 9780123852519. Archived from the original on August 1, 2016. Retrieved March 31, 2014.
Celso C. Ribeiro and Simone L. Martins (2004). Experimental and Efficient Algorithms: Third International Workshop, WEA 2004, Angra Dos Reis, Brazil, May 25-28, 2004, Proceedings, Volume 3. Springer. p. 529. ISBN 9783540220671. Archived from the original on August 1, 2016. Retrieved March 31, 2014.
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"MSM5718C50/MD5764802" (PDF). Oki Semiconductor. February 1999. Archived (PDF) from the original on 2019-06-21. Retrieved 21 June 2019.
"Direct RDRAM" (PDF). Rambus. 12 March 1998. Archived (PDF) from the original on 2019-06-21. Retrieved 21 June 2019.
"EMOTION ENGINE AND GRAPHICS SYNTHESIZER USED IN THE CORE OF PLAYSTATION BECOME ONE CHIP" (PDF). Sony. April 21, 2003. Archived (PDF) from the original on 2017-02-27. Retrieved 26 June 2019.
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"Samsung Unleashes a Roomy DDR4 256GB RAM". Tom's Hardware. 6 September 2018. Archived from the original on June 21, 2019. Retrieved 4 April 2022.
"Hitachi HM5283206FP10 8Mbit SGRAM" (PDF). Smithsonian Institution. Archived (PDF) from the original on 2003-07-16. Retrieved 10 July 2019.
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worldcat.org

Sah, Chih-Tang (October 1988). "Evolution of the MOS transistor-from conception to VLSI" (PDF). Proceedings of the IEEE. 76 (10): 1280–1326 (1303). Bibcode:1988IEEEP..76.1280S. doi:10.1109/5.16328. ISSN 0018-9219.
Robinson, Arthur L. (11 May 1984). "Experimental Memory Chips Reach 1 Megabit: As they become larger, memories become an increasingly important part of the integrated circuit business, technologically and economically". Science. 224 (4649): 590–592. doi:10.1126/science.224.4649.590. ISSN 0036-8075. PMID 17838349.