Register allocation (English Wikipedia)

Analysis of information sources in references of the Wikipedia article "Register allocation" in English language version.

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Koes & Goldstein 2009, p. 21. Koes, David Ryan; Goldstein, Seth Copen (2009). "Register Allocation Deconstructed". Written at Nice, France. Proceedings of the 12th International Workshop on Software and Compilers for Embedded Systems. SCOPES '09. New York, NY, USA: ACM. pp. 21–30. ISBN 978-1-60558-696-0.

apple.com

developer.apple.com

"32-bit PowerPC function calling conventions".

archive.org

Farach & Liberatore 1998, p. 566. Farach, Martin; Liberatore, Vincenzo (1998). "On Local Register Allocation". Written at San Francisco, California, USA. Proceedings of the Ninth Annual ACM-SIAM Symposium on Discrete Algorithms. SODA '98. Philadelphia, PA, USA: Society for Industrial and Applied Mathematics. pp. 564–573. ISBN 0-89871-410-9.

arxiv.org

Bouchez, Darte & Rastello 2007b, p. 103. Bouchez, Florent; Darte, Alain; Rastello, Fabrice (2007b). "On the complexity of spill everywhere under SSA form". ACM SIGPLAN Notices. 42 (7): 103–114. arXiv:0710.3642. doi:10.1145/1273444.1254782. ISSN 0362-1340.
Rogers 2020. Rogers, Ian (2020). "Efficient global register allocation". arXiv:2011.05608 [cs.PL].

doi.org

Ditzel & McLellan 1982, p. 48. Ditzel, David R.; McLellan, H. R. (1982). "Register allocation for free". Proceedings of the first international symposium on Architectural support for programming languages and operating systems - ASPLOS-I. pp. 48–56. doi:10.1145/800050.801825. ISBN 978-0897910668. S2CID 2812379.
Runeson & Nyström 2003, p. 242. Runeson, Johan; Nyström, Sven-Olof (2003). "Retargetable Graph-Coloring Register Allocation for Irregular Architectures". Software and Compilers for Embedded Systems. Lecture Notes in Computer Science. Vol. 2826. pp. 240–254. CiteSeerX 10.1.1.6.6186. doi:10.1007/978-3-540-39920-9_17. ISBN 978-3-540-20145-8. ISSN 0302-9743.
Eisl et al. 2016, p. 14:1. Eisl, Josef; Grimmer, Matthias; Simon, Doug; Würthinger, Thomas; Mössenböck, Hanspeter (2016). "Trace-based Register Allocation in a JIT Compiler". Proceedings of the 13th International Conference on Principles and Practices of Programming on the Java Platform: Virtual Machines, Languages, and Tools - PPPJ '16. pp. 1–11. doi:10.1145/2972206.2972211. ISBN 9781450341356. S2CID 31845919.
Chaitin et al. 1981, p. 47. Chaitin, Gregory J.; Auslander, Marc A.; Chandra, Ashok K.; Cocke, John; Hopkins, Martin E.; Markstein, Peter W. (1981). "Register allocation via coloring". Computer Languages. 6 (1): 47–57. doi:10.1016/0096-0551(81)90048-5. ISSN 0096-0551.
Eisl et al. 2016, p. 1. Eisl, Josef; Grimmer, Matthias; Simon, Doug; Würthinger, Thomas; Mössenböck, Hanspeter (2016). "Trace-based Register Allocation in a JIT Compiler". Proceedings of the 13th International Conference on Principles and Practices of Programming on the Java Platform: Virtual Machines, Languages, and Tools - PPPJ '16. pp. 1–11. doi:10.1145/2972206.2972211. ISBN 9781450341356. S2CID 31845919.
Braun & Hack 2009, p. 174. Braun, Matthias; Hack, Sebastian (2009). "Register Spilling and Live-Range Splitting for SSA-Form Programs". Compiler Construction. Lecture Notes in Computer Science. Vol. 5501. pp. 174–189. CiteSeerX 10.1.1.219.5318. doi:10.1007/978-3-642-00722-4_13. ISBN 978-3-642-00721-7. ISSN 0302-9743.
Bouchez, Darte & Rastello 2007b, p. 103. Bouchez, Florent; Darte, Alain; Rastello, Fabrice (2007b). "On the complexity of spill everywhere under SSA form". ACM SIGPLAN Notices. 42 (7): 103–114. arXiv:0710.3642. doi:10.1145/1273444.1254782. ISSN 0362-1340.
Colombet, Brandner & Darte 2011, p. 26. Colombet, Quentin; Brandner, Florian; Darte, Alain (2011). "Studying optimal spilling in the light of SSA". Proceedings of the 14th international conference on Compilers, architectures and synthesis for embedded systems - CASES '11. p. 25. doi:10.1145/2038698.2038706. ISBN 9781450307130. S2CID 8296742.
Bouchez, Darte & Rastello 2006, p. 4. Bouchez, Florent; Darte, Alain; Rastello, Fabrice (2006). "Register Allocation: What Does the NP-Completeness Proof of Chaitin et al. Really Prove? Or Revisiting Register Allocation: Why and How". Register allocation: what does the NP-Completeness proof of Chaitin et al. really prove?. Lecture Notes in Computer Science. Vol. 4382. pp. 2–14. doi:10.1007/978-3-540-72521-3_21. ISBN 978-3-540-72520-6.
Horwitz et al. 1966, p. 43. Horwitz, L. P.; Karp, R. M.; Miller, R. E.; Winograd, S. (1966). "Index Register Allocation". Journal of the ACM. 13 (1): 43–61. doi:10.1145/321312.321317. ISSN 0004-5411. S2CID 14560597.
Eisl et al. 2017, p. 92. Eisl, Josef; Marr, Stefan; Würthinger, Thomas; Mössenböck, Hanspeter (2017). "Trace Register Allocation Policies" (PDF). Proceedings of the 14th International Conference on Managed Languages and Runtimes - Man Lang 2017. pp. 92–104. doi:10.1145/3132190.3132209. ISBN 9781450353403. S2CID 1195601.
Eisl, Leopoldseder & Mössenböck 2018, p. 1. Eisl, Josef; Leopoldseder, David; Mössenböck, Hanspeter (2018). "Parallel trace register allocation". Proceedings of the 15th International Conference on Managed Languages & Runtimes - Man Lang '18. pp. 1–7. doi:10.1145/3237009.3237010. ISBN 9781450364249. S2CID 52137887.
Briggs, Cooper & Torczon 1992, p. 316. Briggs, Preston; Cooper, Keith D.; Torczon, Linda (1992). "Rematerialization". ACM SIGPLAN Notices. 27 (7): 311–321. doi:10.1145/143103.143143. ISSN 0362-1340.
Poletto & Sarkar 1999, p. 896. Poletto, Massimiliano; Sarkar, Vivek (1999). "Linear scan register allocation". ACM Transactions on Programming Languages and Systems. 21 (5): 895–913. CiteSeerX 10.1.1.27.2462. doi:10.1145/330249.330250. ISSN 0164-0925. S2CID 18180752.
Runeson & Nyström 2003, p. 241. Runeson, Johan; Nyström, Sven-Olof (2003). "Retargetable Graph-Coloring Register Allocation for Irregular Architectures". Software and Compilers for Embedded Systems. Lecture Notes in Computer Science. Vol. 2826. pp. 240–254. CiteSeerX 10.1.1.6.6186. doi:10.1007/978-3-540-39920-9_17. ISBN 978-3-540-20145-8. ISSN 0302-9743.
Book 1975, p. 618–619. Book, Ronald V. (December 1975). "Karp Richard M.. Reducibility among combinatorial problems. Complexity of computer computations, Proceedings of a Symposium on the Complexity of Computer Computations, held March 20-22, 1972, at the IBM Thomas J. Watson Center, Yorktown Heights, New York, edited by Miller Raymond E. and Thatcher James W., Plenum Press, New York and London 1972, pp. 85–103". The Journal of Symbolic Logic. 40 (4): 618–619. doi:10.2307/2271828. ISSN 0022-4812. JSTOR 2271828.
Colombet, Brandner & Darte 2011, p. 1. Colombet, Quentin; Brandner, Florian; Darte, Alain (2011). "Studying optimal spilling in the light of SSA". Proceedings of the 14th international conference on Compilers, architectures and synthesis for embedded systems - CASES '11. p. 25. doi:10.1145/2038698.2038706. ISBN 9781450307130. S2CID 8296742.
Smith, Ramsey & Holloway 2004, p. 277. Smith, Michael D.; Ramsey, Norman; Holloway, Glenn (2004). "A generalized algorithm for graph-coloring register allocation". ACM SIGPLAN Notices. 39 (6): 277. CiteSeerX 10.1.1.71.9532. doi:10.1145/996893.996875. ISSN 0362-1340.
Cavazos, Moss & O’Boyle 2006, p. 124. Cavazos, John; Moss, J. Eliot B.; O’Boyle, Michael F. P. (2006). "Hybrid Optimizations: Which Optimization Algorithm to Use?". Compiler Construction. Lecture Notes in Computer Science. Vol. 3923. pp. 124–138. doi:10.1007/11688839_12. ISBN 978-3-540-33050-9. ISSN 0302-9743.
Runeson & Nyström 2003, p. 240. Runeson, Johan; Nyström, Sven-Olof (2003). "Retargetable Graph-Coloring Register Allocation for Irregular Architectures". Software and Compilers for Embedded Systems. Lecture Notes in Computer Science. Vol. 2826. pp. 240–254. CiteSeerX 10.1.1.6.6186. doi:10.1007/978-3-540-39920-9_17. ISBN 978-3-540-20145-8. ISSN 0302-9743.
Poletto & Sarkar 1999, p. 895. Poletto, Massimiliano; Sarkar, Vivek (1999). "Linear scan register allocation". ACM Transactions on Programming Languages and Systems. 21 (5): 895–913. CiteSeerX 10.1.1.27.2462. doi:10.1145/330249.330250. ISSN 0164-0925. S2CID 18180752.
Poletto & Sarkar 1999, p. 902. Poletto, Massimiliano; Sarkar, Vivek (1999). "Linear scan register allocation". ACM Transactions on Programming Languages and Systems. 21 (5): 895–913. CiteSeerX 10.1.1.27.2462. doi:10.1145/330249.330250. ISSN 0164-0925. S2CID 18180752.
Wimmer & Mössenböck 2005, p. 132. Wimmer, Christian; Mössenböck, Hanspeter (2005). "Optimized interval splitting in a linear scan register allocator". Proceedings of the 1st ACM/USENIX international conference on Virtual execution environments - VEE '05. p. 132. CiteSeerX 10.1.1.394.4054. doi:10.1145/1064979.1064998. ISBN 978-1595930477. S2CID 494490.
Johansson & Sagonas 2002, p. 102. Johansson, Erik; Sagonas, Konstantinos (2002). "Linear Scan Register Allocation in a High-Performance Erlang Compiler". Practical Aspects of Declarative Languages. Lecture Notes in Computer Science. Vol. 2257. pp. 101–119. doi:10.1007/3-540-45587-6_8. ISBN 978-3-540-43092-6. ISSN 0302-9743.
Poletto & Sarkar 1999, p. 899. Poletto, Massimiliano; Sarkar, Vivek (1999). "Linear scan register allocation". ACM Transactions on Programming Languages and Systems. 21 (5): 895–913. CiteSeerX 10.1.1.27.2462. doi:10.1145/330249.330250. ISSN 0164-0925. S2CID 18180752.
Eisl et al. 2016, p. 2. Eisl, Josef; Grimmer, Matthias; Simon, Doug; Würthinger, Thomas; Mössenböck, Hanspeter (2016). "Trace-based Register Allocation in a JIT Compiler". Proceedings of the 13th International Conference on Principles and Practices of Programming on the Java Platform: Virtual Machines, Languages, and Tools - PPPJ '16. pp. 1–11. doi:10.1145/2972206.2972211. ISBN 9781450341356. S2CID 31845919.
Traub, Holloway & Smith 1998, p. 143. Traub, Omri; Holloway, Glenn; Smith, Michael D. (1998). "Quality and speed in linear-scan register allocation". ACM SIGPLAN Notices. 33 (5): 142–151. CiteSeerX 10.1.1.52.8730. doi:10.1145/277652.277714. ISSN 0362-1340.
Traub, Holloway & Smith 1998, p. 141. Traub, Omri; Holloway, Glenn; Smith, Michael D. (1998). "Quality and speed in linear-scan register allocation". ACM SIGPLAN Notices. 33 (5): 142–151. CiteSeerX 10.1.1.52.8730. doi:10.1145/277652.277714. ISSN 0362-1340.
Poletto & Sarkar 1999, p. 897. Poletto, Massimiliano; Sarkar, Vivek (1999). "Linear scan register allocation". ACM Transactions on Programming Languages and Systems. 21 (5): 895–913. CiteSeerX 10.1.1.27.2462. doi:10.1145/330249.330250. ISSN 0164-0925. S2CID 18180752.
Wimmer & Franz 2010, p. 170. Wimmer, Christian; Franz, Michael (2010). "Linear scan register allocation on SSA form". Proceedings of the 8th annual IEEE/ ACM international symposium on Code generation and optimization - CGO '10. p. 170. CiteSeerX 10.1.1.162.2590. doi:10.1145/1772954.1772979. ISBN 9781605586359. S2CID 1820765.
Mössenböck & Pfeiffer 2002, p. 234. Mössenböck, Hanspeter; Pfeiffer, Michael (2002). "Linear Scan Register Allocation in the Context of SSA Form and Register Constraints". Compiler Construction. Lecture Notes in Computer Science. Vol. 2304. pp. 229–246. doi:10.1007/3-540-45937-5_17. ISBN 978-3-540-43369-9. ISSN 0302-9743.
Mössenböck & Pfeiffer 2002, p. 233. Mössenböck, Hanspeter; Pfeiffer, Michael (2002). "Linear Scan Register Allocation in the Context of SSA Form and Register Constraints". Compiler Construction. Lecture Notes in Computer Science. Vol. 2304. pp. 229–246. doi:10.1007/3-540-45937-5_17. ISBN 978-3-540-43369-9. ISSN 0302-9743.
Mössenböck & Pfeiffer 2002, p. 229. Mössenböck, Hanspeter; Pfeiffer, Michael (2002). "Linear Scan Register Allocation in the Context of SSA Form and Register Constraints". Compiler Construction. Lecture Notes in Computer Science. Vol. 2304. pp. 229–246. doi:10.1007/3-540-45937-5_17. ISBN 978-3-540-43369-9. ISSN 0302-9743.
Chaitin 1982, p. 90. Chaitin, G. J. (1982). "Register allocation & spilling via graph coloring". Proceedings of the 1982 SIGPLAN symposium on Compiler construction - SIGPLAN '82. pp. 98–101. doi:10.1145/800230.806984. ISBN 978-0897910743. S2CID 16872867.
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Park & Moon 2004, p. 736. Park, Jinpyo; Moon, Soo-Mook (2004). "Optimistic register coalescing". ACM Transactions on Programming Languages and Systems. 26 (4): 735–765. CiteSeerX 10.1.1.33.9438. doi:10.1145/1011508.1011512. ISSN 0164-0925. S2CID 15969885.
Chaitin 1982, p. 99. Chaitin, G. J. (1982). "Register allocation & spilling via graph coloring". Proceedings of the 1982 SIGPLAN symposium on Compiler construction - SIGPLAN '82. pp. 98–101. doi:10.1145/800230.806984. ISBN 978-0897910743. S2CID 16872867.
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Eisl et al. 2017, p. 11. Eisl, Josef; Marr, Stefan; Würthinger, Thomas; Mössenböck, Hanspeter (2017). "Trace Register Allocation Policies" (PDF). Proceedings of the 14th International Conference on Managed Languages and Runtimes - Man Lang 2017. pp. 92–104. doi:10.1145/3132190.3132209. ISBN 9781450353403. S2CID 1195601.
Cavazos, Moss & O’Boyle 2006, p. 124-127. Cavazos, John; Moss, J. Eliot B.; O’Boyle, Michael F. P. (2006). "Hybrid Optimizations: Which Optimization Algorithm to Use?". Compiler Construction. Lecture Notes in Computer Science. Vol. 3923. pp. 124–138. doi:10.1007/11688839_12. ISBN 978-3-540-33050-9. ISSN 0302-9743.
Eisl et al. 2016, p. 4. Eisl, Josef; Grimmer, Matthias; Simon, Doug; Würthinger, Thomas; Mössenböck, Hanspeter (2016). "Trace-based Register Allocation in a JIT Compiler". Proceedings of the 13th International Conference on Principles and Practices of Programming on the Java Platform: Virtual Machines, Languages, and Tools - PPPJ '16. pp. 1–11. doi:10.1145/2972206.2972211. ISBN 9781450341356. S2CID 31845919.
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Blackburn et al. 2006, p. 169. Blackburn, Stephen M.; Guyer, Samuel Z.; Hirzel, Martin; Hosking, Antony; Jump, Maria; Lee, Han; Eliot, J.; Moss, B.; Phansalkar, Aashish; Stefanović, Darko; VanDrunen, Thomas; Garner, Robin; von Dincklage, Daniel; Wiedermann, Ben; Hoffmann, Chris; Khang, Asjad M.; McKinley, Kathryn S.; Bentzur, Rotem; Diwan, Amer; Feinberg, Daniel; Frampton, Daniel (2006). "The DaCapo benchmarks". Proceedings of the 21st annual ACM SIGPLAN conference on Object-oriented programming systems, languages, and applications - OOPSLA '06. p. 169. doi:10.1145/1167473.1167488. hdl:1885/33723. ISBN 978-1595933485. S2CID 9255051.

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Eisl et al. 2016, p. 14:1. Eisl, Josef; Grimmer, Matthias; Simon, Doug; Würthinger, Thomas; Mössenböck, Hanspeter (2016). "Trace-based Register Allocation in a JIT Compiler". Proceedings of the 13th International Conference on Principles and Practices of Programming on the Java Platform: Virtual Machines, Languages, and Tools - PPPJ '16. pp. 1–11. doi:10.1145/2972206.2972211. ISBN 9781450341356. S2CID 31845919.
Eisl et al. 2016, p. 1. Eisl, Josef; Grimmer, Matthias; Simon, Doug; Würthinger, Thomas; Mössenböck, Hanspeter (2016). "Trace-based Register Allocation in a JIT Compiler". Proceedings of the 13th International Conference on Principles and Practices of Programming on the Java Platform: Virtual Machines, Languages, and Tools - PPPJ '16. pp. 1–11. doi:10.1145/2972206.2972211. ISBN 9781450341356. S2CID 31845919.
Eisl et al. 2017, p. 92. Eisl, Josef; Marr, Stefan; Würthinger, Thomas; Mössenböck, Hanspeter (2017). "Trace Register Allocation Policies" (PDF). Proceedings of the 14th International Conference on Managed Languages and Runtimes - Man Lang 2017. pp. 92–104. doi:10.1145/3132190.3132209. ISBN 9781450353403. S2CID 1195601.
Eisl et al. 2016, p. 2. Eisl, Josef; Grimmer, Matthias; Simon, Doug; Würthinger, Thomas; Mössenböck, Hanspeter (2016). "Trace-based Register Allocation in a JIT Compiler". Proceedings of the 13th International Conference on Principles and Practices of Programming on the Java Platform: Virtual Machines, Languages, and Tools - PPPJ '16. pp. 1–11. doi:10.1145/2972206.2972211. ISBN 9781450341356. S2CID 31845919.
Eisl et al. 2017, p. 11. Eisl, Josef; Marr, Stefan; Würthinger, Thomas; Mössenböck, Hanspeter (2017). "Trace Register Allocation Policies" (PDF). Proceedings of the 14th International Conference on Managed Languages and Runtimes - Man Lang 2017. pp. 92–104. doi:10.1145/3132190.3132209. ISBN 9781450353403. S2CID 1195601.
Eisl et al. 2016, p. 4. Eisl, Josef; Grimmer, Matthias; Simon, Doug; Würthinger, Thomas; Mössenböck, Hanspeter (2016). "Trace-based Register Allocation in a JIT Compiler". Proceedings of the 13th International Conference on Principles and Practices of Programming on the Java Platform: Virtual Machines, Languages, and Tools - PPPJ '16. pp. 1–11. doi:10.1145/2972206.2972211. ISBN 9781450341356. S2CID 31845919.

jstor.org

Book 1975, p. 618–619. Book, Ronald V. (December 1975). "Karp Richard M.. Reducibility among combinatorial problems. Complexity of computer computations, Proceedings of a Symposium on the Complexity of Computer Computations, held March 20-22, 1972, at the IBM Thomas J. Watson Center, Yorktown Heights, New York, edited by Miller Raymond E. and Thatcher James W., Plenum Press, New York and London 1972, pp. 85–103". The Journal of Symbolic Logic. 40 (4): 618–619. doi:10.2307/2271828. ISSN 0022-4812. JSTOR 2271828.

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kar.kent.ac.uk

Eisl et al. 2017, p. 92. Eisl, Josef; Marr, Stefan; Würthinger, Thomas; Mössenböck, Hanspeter (2017). "Trace Register Allocation Policies" (PDF). Proceedings of the 14th International Conference on Managed Languages and Runtimes - Man Lang 2017. pp. 92–104. doi:10.1145/3132190.3132209. ISBN 9781450353403. S2CID 1195601.
Eisl et al. 2017, p. 11. Eisl, Josef; Marr, Stefan; Würthinger, Thomas; Mössenböck, Hanspeter (2017). "Trace Register Allocation Policies" (PDF). Proceedings of the 14th International Conference on Managed Languages and Runtimes - Man Lang 2017. pp. 92–104. doi:10.1145/3132190.3132209. ISBN 9781450353403. S2CID 1195601.

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semanticscholar.org

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web.archive.org

"Intel® 64 and IA-32 Architectures Software Developer's Manual, Section 3.4.1" (PDF). Intel. May 2019. Archived from the original (PDF) on 2019-05-25.

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