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Reset vector (English Wikipedia)

Analysis of information sources in references of the Wikipedia article "Reset vector" in English language version.

refsWebsite
Global rank English rank
5bitsavers.org
4,153rd place
2,291st place
3arm.com
4,773rd place
3,130th place
2web.archive.org
1st place
1st place
2books.google.com
3rd place
3rd place
2sparc.org
low place
low place
1wikichip.org
low place
8,965th place
1intel.com
1,118th place
825th place
1embeddedrelated.com
low place
low place
1cornell.edu
332nd place
246th place
1imgtec.com
low place
low place

arm.com (Global: 4,773rd place; English: 3,130th place)

developer.arm.com

infocenter.arm.com

bitsavers.org (Global: 4,153rd place; English: 2,291st place)

  • "iAPX 86,88 User's Manual" (PDF). Intel. 1981. System Reset, p. 2-29, table 2-4. Retrieved November 14, 2025.
  • "iAPX 286 Programmer's Reference Manual" (PDF). Intel. 1983. Appendix D, iAPX 86/88 Software Compatibility Considerations, p. D-2. Retrieved April 15, 2018. After reset, CS:IP = F000:FFF0 on the iAPX 286. This change was made to allow sufficient code space to enter protected mode without reloading CS.
  • "80386 Programmer's Reference Manual" (PDF). Intel. 1990. Section 10.1 Processor State After Reset, pages 10-1 - 10.3.
  • "80386 Programmer's Reference Manual" (PDF). Intel. 1990. Section 10.2.3 First Instruction, p. 10-4. Retrieved November 3, 2013. Execution begins with the instruction addressed by the initial contents of the CS and IP registers. To allow the initialization software to be placed in a ROM at the top of the address space, the high 12 bits of addresses issued for the code segment are set, until the first instruction which loads the CS register, such as a far jump or call. As a result, instruction fetching begins from address 0FFFFFFF0H.
  • Wilcox, Dick (October 4, 1976). WD16 Microcomputer Programmer's reference Manual (PDF). Western Digital. p. 3. Retrieved 21 August 2025.

books.google.com (Global: 3rd place; English: 3rd place)

cornell.edu (Global: 332nd place; English: 246th place)

cs.cornell.edu

embeddedrelated.com (Global: low place; English: low place)

imgtec.com (Global: low place; English: low place)

cdn2.imgtec.com

intel.com (Global: 1,118th place; English: 825th place)

download.intel.com

  • "Intel® 64 and IA-32 Architectures Software Developer's Manual" (PDF). Intel. May 2012. Section 9.1.4 First Instruction Executed, p. 2611. Archived from the original (PDF) on 2012-08-08. Retrieved August 23, 2012. The first instruction that is fetched and executed following a hardware reset is located at physical address FFFFFFF0h. This address is 16 bytes below the processor's uppermost physical address. The EPROM containing the software-initialization code must be located at this address.

sparc.org (Global: low place; English: low place)

web.archive.org (Global: 1st place; English: 1st place)

wikichip.org (Global: low place; English: 8,965th place)

en.wikichip.org

  • "AMD 80286 Datasheet" (PDF). AMD. 1985. p. 13. the 286 begins execution in real mode with the instruction at physical location FFFFF0H.