Semiconductor device fabrication (English Wikipedia)

Huff, Howard R.; Goodall, Randal K.; Bullis, W. Murray; Moreland, James A.; Kirscht, Fritz G.; Wilson, Syd R.; The NTRS Starting Materials Team (24 November 1998). "Model-based silicon wafer criteria for optimal integrated circuit performance". AIP Conference Proceedings. Vol. 449. pp. 97–112. doi:10.1063/1.56795.

anandtech.com

Cutress, Ian. "Intel's 10nm Cannon Lake and Core i3-8121U Deep Dive Review". AnandTech. Archived from the original on 2020-11-12. Retrieved 2020-11-07.
Cutress, Ian. "Intel's Process Roadmap to 2025: With 4nm, 3nm, 20A and 18A?!". AnandTech.
Shilov, Anton. "Samsung Completes Development of 5nm EUV Process Technology". AnandTech. Archived from the original on 2019-04-20. Retrieved 2019-05-31.
Shilov, Anton; Cutress, Ian. "GlobalFoundries Stops All 7nm Development: Opts To Focus on Specialized Processes". AnandTech. Archived from the original on 2019-10-12. Retrieved 2019-10-12.
Cutress, Dr Ian. "Early TSMC 5nm Test Chip Yields 80%, HVM Coming in H1 2020". AnandTech. Archived from the original on 2020-05-25. Retrieved 2020-04-12.

anysilicon.com

"Top 10 Worldwide Semiconductor Sales Leaders - Q1 2017 - AnySilicon". AnySilicon. 2017-05-09. Archived from the original on 2017-11-06. Retrieved 2017-11-19.

arstechnica.com

"Transistors will stop shrinking in 2021, but Moore's law will live on". 25 July 2016.
"Chip shortages lead to more counterfeit chips and devices". 14 June 2021.

axcelis.com

Rubin, Leonard; Poate, John (June–July 2003). "Ion Implantation in Silicon Technology" (PDF). The Industrial Physicist. 9 (3). American Institute of Physics: 12–15.
Glavish, Hilton; Farley, Marvin. Review of Major Innovations in Beam Line Design (PDF). 2018 22nd International Conference on Ion Implantation Technology (IIT). doi:10.1109/IIT.2018.8807986.

books.google.com

Nishi, Yoshio; Doering, Robert (19 December 2017). Handbook of Semiconductor Manufacturing Technology. CRC Press. ISBN 978-1-4200-1766-3.
Mack, Chris (11 March 2008). Fundamental Principles of Optical Lithography: The Science of Microfabrication. John Wiley & Sons. ISBN 978-0-470-72386-9.
Lambrechts, Wynand; Sinha, Saurabh; Abdallah, Jassem Ahmed; Prinsloo, Jaco (13 September 2018). Extending Moore's Law through Advanced Semiconductor Design and Processing Techniques. CRC Press. ISBN 978-1-351-24866-2.
Yu, Shimeng (19 April 2022). Semiconductor Memory Devices and Circuits. CRC Press. ISBN 978-1-000-56761-8.
Lojek, Bo (2007). History of Semiconductor Engineering. Springer Science & Business Media. p. 330. ISBN 9783540342588. Archived from the original on 2020-08-06. Retrieved 2019-07-21.
Extending Moore's Law through Advanced Semiconductor Design and Processing Techniques. CRC Press. 13 September 2018. ISBN 978-1-351-24866-2.
How Transistor Area Shrank by 1 Million Fold. Springer. 15 July 2020. ISBN 978-3-030-40021-7.
Wafer Fabrication: Factory Performance and Analysis. Springer. 30 November 1995. ISBN 978-0-7923-9619-2.
Vacuum Deposition onto Webs, Films and Foils. William Andrew. 21 June 2011. ISBN 978-1-4377-7868-7.
Zhang, Jie (24 September 2018). Wafer Fabrication: Automatic Material Handling System. Walter de Gruyter GmbH & Co KG. ISBN 978-3-11-048723-7.
Dry Etching for VLSI. Springer. 29 June 2013. ISBN 978-1-4899-2566-4.
Introduction to Microfabrication. John Wiley & Sons. 28 January 2005. ISBN 978-0-470-02056-2.
Labor, U. S. Dept of (February 19, 2000). Occupational Outlook Handbook. JIST Publishing. ISBN 978-1-56370-677-6 – via Google Books.
Reinhardt, Karen; Kern, Werner (March 16, 2018). Handbook of Silicon Wafer Cleaning Technology. William Andrew. p. 223. ISBN 978-0-323-51085-1. Retrieved 8 January 2024.
Hattori, Takeshi (September 30, 2009). Cleaning and Surface Conditioning Technology in Semiconductor Device Manufacturing 11. The Electrochemical Society. ISBN 978-1-56677-742-1 – via Google Books.
Handbook of Integrated Circuit Industry. Springer. 27 November 2023. ISBN 978-981-99-2836-1.
Einspruch, Norman G.; Brown, Dale M. (December 1, 2014). Plasma Processing for VLSI. Academic Press. ISBN 978-1-4832-1775-8 – via Google Books.
Verhaverbeke, S.; Beaudry, C.; Boelen, P. (2004). Aqueous Single Pass Single Wafer AI/Via Cleaning. Electrochemical Society. pp. 23–26. ISBN 978-1-56677-411-6. Retrieved 8 January 2024.
Microlithography: Science and Technology, Second Edition. CRC Press. 3 October 2018. ISBN 978-1-4200-5153-7.
Sugawara, M. (May 28, 1998). Plasma Etching: Fundamentals and Applications. OUP Oxford. ISBN 978-0-19-159029-0 – via Google Books.
Nojiri, Kazuo (October 25, 2014). Dry Etching Technology for Semiconductors. Springer. ISBN 978-3-319-10295-5 – via Google Books.
Sugawara, M. (May 28, 1998). Plasma Etching: Fundamentals and Applications. OUP Oxford. ISBN 978-0-19-159029-0 – via Google Books.
Li, Jinmin; Wang, Junxi; Yi, Xiaoyan; Liu, Zhiqiang; Wei, Tongbo; Yan, Jianchang; Xue, Bin (August 31, 2020). III-Nitrides Light Emitting Diodes: Technology and Applications. Springer Nature. ISBN 978-981-15-7949-3 – via Google Books.
Powell, R. A. (December 2, 2012). Dry Etching for Microelectronics. Elsevier. ISBN 978-0-08-098358-5 – via Google Books.
Lienig, Jens; Scheible, Juergen (March 19, 2020). Fundamentals of Layout Design for Electronic Circuits. Springer Nature. ISBN 978-3-030-39284-0 – via Google Books.
Köhler, Michael (July 11, 2008). Etching in Microsystem Technology. John Wiley & Sons. ISBN 978-3-527-61379-3 – via Google Books.
Franssila, Sami (28 January 2005). Introduction to Microfabrication. John Wiley & Sons. ISBN 978-0-470-02056-2.
Lian, Yaguang (10 October 2022). Semiconductor Microchips and Fabrication: A Practical Guide to Theory and Manufacturing. John Wiley & Sons. ISBN 978-1-119-86780-7.
Nishi, Yoshio; Doering, Robert (December 19, 2017). Handbook of Semiconductor Manufacturing Technology. CRC Press. ISBN 978-1-4200-1766-3 – via Google Books.
Grovenor, C. R. M. (October 5, 2017). Microelectronic Materials. Routledge. ISBN 978-1-351-43154-5 – via Google Books.
Semiconductor Manufacturing Technology. World Scientific Publishing Company. 3 March 2008. ISBN 978-981-310-671-0.
Nathan, Arokia; Saha, Samar K.; Todi, Ravi M. (August 2023). 75th Anniversary of the Transistor. John Wiley & Sons. ISBN 978-1-394-20244-7.
Complementary Metal Oxide Semiconductor. BoD – Books on Demand. August 2018. ISBN 978-1-78923-496-1.
Widmann, D.; Mader, H.; Friedrich, H. (9 March 2013). Technology of Integrated Circuits. Springer. ISBN 978-3-662-04160-4.
Chemical-Mechanical Planarization of Semiconductor Materials. Springer. 26 January 2004. ISBN 978-3-540-43181-7.
Copper Interconnect Technology. Springer. 22 January 2010. ISBN 978-1-4419-0076-0.
Baliga, B. (December 2, 2012). Epitaxial Silicon Technology. Elsevier. ISBN 978-0-323-15545-8 – via Google Books.

chinawaterrisk.org

"8 Things You Should Know About Water & Semiconductors". China Water Risk. 11 July 2013. Retrieved 2023-01-21.

chip-architect.com

de Vries, Hans. "Chip Architect: Intel and Motorola/AMD's 130 nm processes to be revealed". chip-architect.com. Retrieved 22 April 2018.

chiphistory.org

"Wafer fab costs skyrocketing out of control".
"Kla 200 Series".
"KLA 2020 - the tool that sparked the yield management revolution".
"Applied Materials Precision 5000 CVD System".
"Series 900 In-Line Sputtering System by MRC".
"Applied Materials Producer".
"300mm Semiconductor Wafers get a reprieve". Chip History.
"Applied Materials Producer - a new revolution is upon us". Chip History.
"The ASYST SMIF system - Integrated with the Tencor Surfscan 7200". Chip History. Archived from the original on 2020-10-16. Retrieved 2020-10-14.
"BEOL Wiring Process for CMOS Logic".
"Ibm's Development of Copper Interconnect for Integrated Circuit".

cleanroomtechnology.com

"Study into human particle shedding". www.cleanroomtechnology.com. Archived from the original on 2020-10-15. Retrieved 2020-10-14.

cmmmagazine.com

"Single Wafer vs Batch Wafer Processing in MEMS Manufacturing". 2 August 2016. Archived from the original on 18 February 2024. Retrieved 18 February 2024.

cnet.com

"Why tech pollution's going global". CNET. April 25, 2002. Retrieved February 17, 2024.

computerhistory.org

"1963: Complementary MOS Circuit Configuration is Invented". Computer History Museum. Archived from the original on 23 July 2019. Retrieved 6 July 2019.
"From a Slice of Crystal to an IC Wafer - CHM Revolution". www.computerhistory.org.
"1954: Diffusion Process Developed for Transistors | the Silicon Engine | Computer History Museum".

design-reuse.com

Shukla, Priyank. "A Brief History of Process Node Evolution". Design And Reuse.
Shukla, Priyank. "A Brief History of Process Node Evolution". design-reuse.com. Archived from the original on 2019-07-09. Retrieved 2019-07-09.

disco.co.jp

"Laser Lift-Off(LLO) Ideal for high brightness vertical LED manufacturing - Press Release - DISCO Corporation". www.disco.co.jp. Archived from the original on 2019-06-14. Retrieved 2019-05-26.
"Product Information | Polishers - DISCO Corporation". www.disco.co.jp. Archived from the original on 2019-05-26. Retrieved 2019-05-26.
"Product Information | DBG / Package Singulation - DISCO Corporation". www.disco.co.jp. Archived from the original on 2019-05-16. Retrieved 2019-05-26.

doi.org

Hendrik Purwins; Bernd Barak; Ahmed Nagi; Reiner Engel; Uwe Höckele; Andreas Kyek; Srikanth Cherla; Benjamin Lenz; Günter Pfeifer; Kurt Weinzierl (2014). "Regression Methods for Virtual Metrology of Layer Thickness in Chemical Vapor Deposition". IEEE/ASME Transactions on Mechatronics. 19 (1): 1–8. doi:10.1109/TMECH.2013.2273435. S2CID 12369827. Retrieved November 9, 2015.
Lei, Wei-Sheng; Kumar, Ajay; Yalamanchili, Rao (2012-04-06). "Die singulation technologies for advanced packaging: A critical review". Journal of Vacuum Science & Technology B, Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phenomena. 30 (4): 040801. Bibcode:2012JVSTB..30d0801L. doi:10.1116/1.3700230. ISSN 2166-2746.
Wang, H. P.; Kim, S. C.; Liu, B. (2014). Advanced FOUP purge using diffusers for FOUP door-off application. 25th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC 2014). pp. 120–124. doi:10.1109/ASMC.2014.6846999. ISBN 978-1-4799-3944-2. S2CID 2482339.
Lin, Tee; Fu, Ben-Ran; Hu, Shih-Cheng; Tang, Yi-Han (2018). "Moisture Prevention in a Pre-Purged Front-Opening Unified Pod (FOUP) During Door Opening in a Mini-Environment". IEEE Transactions on Semiconductor Manufacturing. 31 (1): 108–115. doi:10.1109/TSM.2018.2791985. S2CID 25469704.
Kim, Seong Chan; Schelske, Greg (2016). FOUP purge performance improvement using EFEM flow converter. 2016 27th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC). pp. 6–11. doi:10.1109/ASMC.2016.7491075. ISBN 978-1-5090-0270-2. S2CID 3240442.
Benalcazar, David; Lin, Tee; Hu, Ming-Hsuan; Ali Zargar, Omid; Lin, Shao-Yu; Shih, Yang-Cheng; Leggett, Graham (2022). "A Numerical Study on the Effects of Purge and Air Curtain Flow Rates on Humidity Invasion Into a Front Opening Unified Pod (FOUP)". IEEE Transactions on Semiconductor Manufacturing. 35 (4): 670–679. doi:10.1109/TSM.2022.3209221. S2CID 252555815.
Lin, Tee; Ali Zargar, Omid; Juina, Oscar; Lee, Tzu-Chieh; Sabusap, Dexter Lyndon; Hu, Shih-Cheng; Leggett, Graham (2020). "Performance of Different Front-Opening Unified Pod (FOUP) Moisture Removal Techniques With Local Exhaust Ventilation System". IEEE Transactions on Semiconductor Manufacturing. 33 (2): 310–315. doi:10.1109/TSM.2020.2977122. S2CID 213026336.
Sah, Chih-Tang; Wanlass, Frank (February 1963). "Nanowatt logic using field-effect metal-oxide semiconductor triodes". 1963 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. Vol. VI. pp. 32–33. doi:10.1109/ISSCC.1963.1157450.
Manasevit, H. M.; Simpson, W. J. (1964). "Single-Crystal Silicon on a Sapphire Substrate". Journal of Applied Physics. 35 (4): 1349–51. Bibcode:1964JAP....35.1349M. doi:10.1063/1.1713618.
Mueller, C. W.; Robinson, P. H. (December 1964). "Grown-film silicon transistors on sapphire". Proceedings of the IEEE. 52 (12): 1487–90. doi:10.1109/PROC.1964.3436.
0.18um BCD technology with best-in-class LDMOS from 6 V to 45 V. 2014 IEEE 26th International Symposium on Power Semiconductor Devices & IC's (ISPSD). doi:10.1109/ISPSD.2014.6856005.
"The world's first 300 mm fab at Infineon - challenges and success". Proceedings of ISSM2000. Ninth International Symposium on Semiconductor Manufacturing (IEEE Cat. No.00CH37130). doi:10.1109/ISSM.2000.993612. S2CID 109383925.
Huff, Howard R.; Goodall, Randal K.; Bullis, W. Murray; Moreland, James A.; Kirscht, Fritz G.; Wilson, Syd R.; The NTRS Starting Materials Team (24 November 1998). "Model-based silicon wafer criteria for optimal integrated circuit performance". AIP Conference Proceedings. Vol. 449. pp. 97–112. doi:10.1063/1.56795.
"Manufacturing advantages of single wafer high current ion implantation". Proceedings of 11th International Conference on Ion Implantation Technology. doi:10.1109/IIT.1996.586424. S2CID 70599233.
Renau, A. (2005). "Approaches to single wafer high current ion implantation". Nuclear Instruments and Methods in Physics Research Section B: Beam Interactions with Materials and Atoms. 237 (1–2): 284–289. Bibcode:2005NIMPB.237..284R. doi:10.1016/j.nimb.2005.05.016.
Hossain-Pas, S.; Pas, M. F. (1997). "Understanding the Impact of Batch vs. Single Wafer in Thermal Processing Using Cost of Ownership Analysis". MRS Proceedings. 470. doi:10.1557/PROC-470-201.
Weimer, R.A.; Eppich, D.M.; Beaman, K.L.; Powell, D.C.; Gonzalez, F. (2003). "Contrasting single-wafer and batch processing for memory devices". IEEE Transactions on Semiconductor Manufacturing. 16 (2): 138–146. doi:10.1109/TSM.2003.810939.
"Trends in single-wafer processing". 1992 Symposium on VLSI Technology Digest of Technical Papers. doi:10.1109/VLSIT.1992.200629. S2CID 110840307.
Bohr, Mark T.; Young, Ian A. (2017). "CMOS Scaling Trends and Beyond". IEEE Micro. 37 (6): 20–29. doi:10.1109/MM.2017.4241347. S2CID 6700881. The next major transistor innovation was the introduction of FinFET (tri-gate) transistors on Intel's 22-nm technology in 2011.
Natraj Narayanswami (1999). "A Theoretical Analysis of Wafer Cleaning Using a Cryogenic Aerosol". Journal of the Electrochemical Society. 146 (2): 767–774. Bibcode:1999JElS..146..767N. doi:10.1149/1.1391679. Retrieved 8 January 2024.
Reiter, Tamas; McCann, Michael; Connolly, James; Haughey, Sean (February 2022). "An Investigation of Edge Bead Removal Width Variability, Effects and Process Control in Photolithographic Manufacturing". IEEE Transactions on Semiconductor Manufacturing. 35 (1): 60–66. doi:10.1109/TSM.2021.3129770. S2CID 244560651.
Ryu, Je Hyeok; Kim, Byoung Hoon; Yoon, Sung Jin (2017). "Characterization of thin carbonized photoresist layer and investigation of dry strip process through real-time monitored variable temperature control". 2017 28th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC). pp. 102–106. doi:10.1109/ASMC.2017.7969207. ISBN 978-1-5090-5448-0.
Glavish, Hilton; Farley, Marvin. Review of Major Innovations in Beam Line Design (PDF). 2018 22nd International Conference on Ion Implantation Technology (IIT). doi:10.1109/IIT.2018.8807986.
Fair, Richard B. (January 1998). "History of Some Early Developments in Ion-Implantation Technology Leading to Silicon Transistor Manufacturing" (PDF). Proceedings of the IEEE. 86 (1): 111–137. doi:10.1109/5.658764. Archived from the original (PDF) on 2 September 2007. Retrieved 26 February 2024.
"Ion implantation in CMOS Technology: Machine Challenges". Ion Implantation and Synthesis of Materials. Springer. 2006. pp. 213–238. doi:10.1007/978-3-540-45298-0_15. ISBN 978-3-540-23674-0.
Virtual Metrology Technique for Semiconductor Manufacturing. The 2006 IEEE International Joint Conference on Neural Network Proceedings. doi:10.1109/IJCNN.2006.247284. S2CID 1194426.
High-k/metal gates in leading edge silicon devices. 2012 SEMI Advanced Semiconductor Manufacturing Conference. doi:10.1109/ASMC.2012.6212925. S2CID 32122636.
Gate-first high-k/metal gate DRAM technology for low power and high performance products. 2015 IEEE International Electron Devices Meeting (IEDM). doi:10.1109/IEDM.2015.7409775. S2CID 35956689.
Tateshita, Y.; Wang, J.; Nagano, K.; Hirano, T.; Miyanami, Y.; Ikuta, T.; Kataoka, T.; Kikuchi, Y.; Yamaguchi, S.; Ando, T.; Tai, K.; Matsumoto, R.; Fujita, S.; Yamane, C.; Yamamoto, R.; Kanda, S.; Kugimiya, K.; Kimura, T.; Ohchi, T.; Yamamoto, Y.; Nagahama, Y.; Hagimoto, Y.; Wakabayashi, H.; Tagawa, Y.; Tsukamoto, M.; Iwamoto, H.; Saito, M.; Kadomura, S.; Nagashima, N. (2006). "High-Performance and Low-Power CMOS Device Technologies Featuring Metal/High-k Gate Stacks with Uniaxial Strained Silicon Channels on (100) and (110) Substrates". 2006 International Electron Devices Meeting. pp. 1–4. doi:10.1109/IEDM.2006.346959. ISBN 1-4244-0438-X. S2CID 23881959.
Narayanan, V. (2007). "High-k/Metal Gates- from research to reality". 2007 International Workshop on Physics of Semiconductor Devices. pp. 42–45. doi:10.1109/IWPSD.2007.4472451. ISBN 978-1-4244-1727-8. S2CID 25926459.
Khare, Mukesh (2007). "High-K/Metal Gate Technology: A New Horizon". 2007 IEEE Custom Integrated Circuits Conference. pp. 417–420. doi:10.1109/CICC.2007.4405765. ISBN 978-1-4244-0786-6. S2CID 1589266.
Dubois, Geraud; Volksen, Willi (February 24, 2012). "Low- k Materials: Recent Advances". In Baklanov, Mikhail R.; Ho, Paul S.; Zschech, Ehrenfried (eds.). Low- k Materials: Recent Advances. Wiley. pp. 1–33. doi:10.1002/9781119963677.ch1. ISBN 978-0-470-66254-0 – via CrossRef.
Li, Z.; Tian, Y.; Teng, C.; Cao, H. (2020). "Recent Advances in Barrier Layer of Cu Interconnects". Materials. 13 (21): 5049. Bibcode:2020Mate...13.5049L. doi:10.3390/ma13215049. PMC 7664900. PMID 33182434.
Löper, Philipp; Stuckelberger, Michael; Niesen, Bjoern; Werner, Jérémie; Filipič, Miha; Moon, Soo-Jin; Yum, Jun-Ho; Topič, Marko; De Wolf, Stefaan; Ballif, Christophe (2015). "Complex Refractive Index Spectra of CH3NH3PbI3 Perovskite Thin Films Determined by Spectroscopic Ellipsometry and Spectrophotometry". The Journal of Physical Chemistry Letters. 6 (1): 66–71. doi:10.1021/jz502471h. PMID 26263093. Retrieved 2021-11-16.

edn.com

"The 300mm Era Begins". 10 July 2000.
"'Bridge tools' appear to be taking over 300-mm movement". 26 April 2001.

eejournal.com

"Life at 10nm. (Or is it 7nm?) And 3nm - Views on Advanced Silicon Platforms". eejournal.com. 2018-03-12. Archived from the original on 2019-07-09. Retrieved 2019-07-09.

eesemi.com

"Wafer Cleaning Procedures; Photoresist or Resist Stripping; Removal of Films and Particulates". www.eesemi.com. Archived from the original on 2020-10-15. Retrieved 2020-10-14.
"Wafer Backgrind". eesemi.com. Archived from the original on 2021-01-22. Retrieved 2020-12-18.

eetimes.com

"Novellus offers 300-mm CVD tool that's smaller than 200-mm, lower costs". 10 July 2000.
Becker, Scott (24 March 2003). "The future of batch and single-wafer processing in wafer cleaning". EE Times.
"Get ready for 675-mm fabs in 2021". 14 November 2006.
"Samsung, GF Ramp FD-SOI". 27 April 2018.
"Tracing Samsung's Road to 14nm". 12 May 2015.
"Cobalt Encapsulation Extends Copper to 10nm". 13 May 2014.

eetimes.eu

Pelé, A-F. (29 March 2022). "Unlocking the Potential of Molecular Beam Epitaxy". AspenCore. Retrieved 8 January 2024.

extremetech.com

Hruska, Joel (23 June 2014). "14nm, 7nm, 5nm: How low can CMOS go? It depends if you ask the engineers or the economists…". ExtremeTech. Archived from the original on 2019-07-09. Retrieved 2019-07-09.
"7nm, 5nm, 3nm: The new materials and transistors that will take us to the limits of Moore's law | Extremetech".

f450c.org

"Evolution of the Silicon Wafer Infographic".

ft.com

"US urges Taiwan to curb chip exports to China".

harvard.edu

ui.adsabs.harvard.edu

Lei, Wei-Sheng; Kumar, Ajay; Yalamanchili, Rao (2012-04-06). "Die singulation technologies for advanced packaging: A critical review". Journal of Vacuum Science & Technology B, Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phenomena. 30 (4): 040801. Bibcode:2012JVSTB..30d0801L. doi:10.1116/1.3700230. ISSN 2166-2746.
Manasevit, H. M.; Simpson, W. J. (1964). "Single-Crystal Silicon on a Sapphire Substrate". Journal of Applied Physics. 35 (4): 1349–51. Bibcode:1964JAP....35.1349M. doi:10.1063/1.1713618.
Renau, A. (2005). "Approaches to single wafer high current ion implantation". Nuclear Instruments and Methods in Physics Research Section B: Beam Interactions with Materials and Atoms. 237 (1–2): 284–289. Bibcode:2005NIMPB.237..284R. doi:10.1016/j.nimb.2005.05.016.
Natraj Narayanswami (1999). "A Theoretical Analysis of Wafer Cleaning Using a Cryogenic Aerosol". Journal of the Electrochemical Society. 146 (2): 767–774. Bibcode:1999JElS..146..767N. doi:10.1149/1.1391679. Retrieved 8 January 2024.
Li, Z.; Tian, Y.; Teng, C.; Cao, H. (2020). "Recent Advances in Barrier Layer of Cu Interconnects". Materials. 13 (21): 5049. Bibcode:2020Mate...13.5049L. doi:10.3390/ma13215049. PMC 7664900. PMID 33182434.

henkel-adhesives.com

"Die Attach Film Adhesives". www.henkel-adhesives.com. Archived from the original on 2019-05-26. Retrieved 2019-05-26.

hitachi.com

Kure, Tokuo; Hanaoka, Hideo; Sugiura, Takumi; Nakagawa, Shinya (2007). "Clean-room Technologies for the Mini-environment Age" (PDF). Hitachi Review. 56 (3): 70–74. CiteSeerX 10.1.1.493.1460. S2CID 30883737. Archived (PDF) from the original on 2021-11-01. Retrieved 2021-11-01.

ieee.org

ieeexplore.ieee.org

Hendrik Purwins; Bernd Barak; Ahmed Nagi; Reiner Engel; Uwe Höckele; Andreas Kyek; Srikanth Cherla; Benjamin Lenz; Günter Pfeifer; Kurt Weinzierl (2014). "Regression Methods for Virtual Metrology of Layer Thickness in Chemical Vapor Deposition". IEEE/ASME Transactions on Mechatronics. 19 (1): 1–8. doi:10.1109/TMECH.2013.2273435. S2CID 12369827. Retrieved November 9, 2015.
Wang, H. P.; Kim, S. C.; Liu, B. (2014). Advanced FOUP purge using diffusers for FOUP door-off application. 25th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC 2014). pp. 120–124. doi:10.1109/ASMC.2014.6846999. ISBN 978-1-4799-3944-2. S2CID 2482339.
450mm FOUP/LPU system in advanced semiconductor manufacturing processes: A study on the minimization of oxygen content inside FOUP when the door is opened. 2015 Joint e-Manufacturing and Design Collaboration Symposium (eMDC) & 2015 International Symposium on Semiconductor Manufacturing (ISSM).
Lin, Tee; Fu, Ben-Ran; Hu, Shih-Cheng; Tang, Yi-Han (2018). "Moisture Prevention in a Pre-Purged Front-Opening Unified Pod (FOUP) During Door Opening in a Mini-Environment". IEEE Transactions on Semiconductor Manufacturing. 31 (1): 108–115. doi:10.1109/TSM.2018.2791985. S2CID 25469704.
Kim, Seong Chan; Schelske, Greg (2016). FOUP purge performance improvement using EFEM flow converter. 2016 27th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC). pp. 6–11. doi:10.1109/ASMC.2016.7491075. ISBN 978-1-5090-0270-2. S2CID 3240442.
Benalcazar, David; Lin, Tee; Hu, Ming-Hsuan; Ali Zargar, Omid; Lin, Shao-Yu; Shih, Yang-Cheng; Leggett, Graham (2022). "A Numerical Study on the Effects of Purge and Air Curtain Flow Rates on Humidity Invasion Into a Front Opening Unified Pod (FOUP)". IEEE Transactions on Semiconductor Manufacturing. 35 (4): 670–679. doi:10.1109/TSM.2022.3209221. S2CID 252555815.
Lin, Tee; Ali Zargar, Omid; Juina, Oscar; Lee, Tzu-Chieh; Sabusap, Dexter Lyndon; Hu, Shih-Cheng; Leggett, Graham (2020). "Performance of Different Front-Opening Unified Pod (FOUP) Moisture Removal Techniques With Local Exhaust Ventilation System". IEEE Transactions on Semiconductor Manufacturing. 33 (2): 310–315. doi:10.1109/TSM.2020.2977122. S2CID 213026336.
0.18um BCD technology with best-in-class LDMOS from 6 V to 45 V. 2014 IEEE 26th International Symposium on Power Semiconductor Devices & IC's (ISPSD). doi:10.1109/ISPSD.2014.6856005.
"The world's first 300 mm fab at Infineon - challenges and success". Proceedings of ISSM2000. Ninth International Symposium on Semiconductor Manufacturing (IEEE Cat. No.00CH37130). doi:10.1109/ISSM.2000.993612. S2CID 109383925.
"Manufacturing advantages of single wafer high current ion implantation". Proceedings of 11th International Conference on Ion Implantation Technology. doi:10.1109/IIT.1996.586424. S2CID 70599233.
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