Static random-access memory (English Wikipedia)

Analysis of information sources in references of the Wikipedia article "Static random-access memory" in English language version.

Last modified: 17:12:45, 10 August 2026 (UTC)

Ref.Un. Ref.Website

Global rank English rank

2019web.archive.org

1^st place

76doi.org

2^nd place

55books.google.com

3^rd place

54semanticscholar.org

15^th place

8^th place

52eetimes.com

4,224^th place

2,761^st place

33computerhistory.org

2,702^nd place

1,789^th place

22espacenet.com

950^th place

813^th place

22adsabs.harvard.edu

14^th place

9^th place

22intel.com

1,727^th place

1,234^th place

21archives-ouvertes.fr

1,143^rd place

973^rd place

11kfupm.edu.sa

low place

11cam.ac.uk

569^th place

354^th place

11wccftech.com

6,369^th place

4,426^th place

11ti.com

6,779^th place

4,625^th place

1114.by

low place

11eeherald.com

low place

11archive.org

6^th place

11digikey.com

low place

11oxfordjournals.org

1,550^th place

3,406^th place

11illinois.edu

1,178^th place

745^th place

11freepatentsonline.com

7,823^rd place

5,787^th place

11tezzaron.com

low place

11tandfonline.com

286^th place

209^th place

11psu.edu

299^th place

159^th place

11arxiv.org

49^th place

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11worldcat.org

4^th place

11berkeley.edu

621^st place

429^th place

14.by (Global: low place; English: low place)

3.14.by

"Homemade CPU – from scratch: Svarichevsky Mikhail". 3.14.by. Archived from the original on 2024-01-27. Retrieved 2024-01-27.

adsabs.harvard.edu (Global: 14^th place; English: 9^th place)

ui.adsabs.harvard.edu

Kulkarni, Jaydeep P.; Kim, Keejong; Roy, Kaushik (2007). "A 160 mV Robust Schmitt Trigger Based Subthreshold SRAM". IEEE Journal of Solid-State Circuits. 42 (10): 2303. Bibcode:2007IJSSC..42.2303K. doi:10.1109/JSSC.2007.897148. S2CID 699469.
Torrens, Gabriel; Alorda, Bartomeu; Carmona, Cristian; Malagon-Perianez, Daniel; Segura, Jaume; Bota, Sebastia (2019). "A 65-nm Reliable 6T CMOS SRAM Cell with Minimum Size Transistors". IEEE Transactions on Emerging Topics in Computing. 7 (3): 447–455. arXiv:2411.18114. Bibcode:2019ITETC...7..447T. doi:10.1109/TETC.2017.2721932. ISSN 2168-6750.

archive.org (Global: 6^th place; English: 6^th place)

Computer organization (4th ed.). [S.l.]: McGraw-Hill. 1996-07-01. ISBN 978-0-07-114323-3.

archives-ouvertes.fr (Global: 1,143^rd place; English: 973^rd place)

tel.archives-ouvertes.fr

Reda, Boumchedda (May 20, 2019). "Ultra-low voltage and energy efficient SRAM design with new technologies for IoT applications". Grenoble Alpes University. Archived from the original on November 30, 2021. Retrieved November 30, 2021.

arxiv.org (Global: 49^th place; English: 31^st place)

Torrens, Gabriel; Alorda, Bartomeu; Carmona, Cristian; Malagon-Perianez, Daniel; Segura, Jaume; Bota, Sebastia (2019). "A 65-nm Reliable 6T CMOS SRAM Cell with Minimum Size Transistors". IEEE Transactions on Emerging Topics in Computing. 7 (3): 447–455. arXiv:2411.18114. Bibcode:2019ITETC...7..447T. doi:10.1109/TETC.2017.2721932. ISSN 2168-6750.

berkeley.edu (Global: 621^st place; English: 429^th place)

www2.eecs.berkeley.edu

"SRAM Leakage Suppression by Minimizing Standby Supply Voltage" (PDF). Retrieved 2026-07-23.

books.google.com (Global: 3^rd place; English: 3^rd place)

Emerson W. Pugh; Lyle R. Johnson; John H. Palmer (1991). IBM's 360 and Early 370 Systems. MIT Press. p. 462. ISBN 978-0-262-16123-7.
Null, Linda; Lobur, Julia (2006). The Essentials of Computer Organization and Architecture. Jones and Bartlett Publishers. p. 282. ISBN 978-0-7637-3769-6. Retrieved 2021-09-14.
Stam, Nick (December 21, 1993). "PCMCIA's System Architecture". PC Mag. Ziff Davis, Inc. – via Google Books.
Matzkin, Jonathan (December 26, 1989). "$399 Atari Portfolio Takes on Hand-held Poqet PC". PC Mag. Ziff Davis, Inc. – via Google Books.
Chen, Wai-Kai (October 3, 2018). The VLSI Handbook. CRC Press. ISBN 978-1-4200-0596-7 – via Google Books.

cam.ac.uk (Global: 569^th place; English: 354^th place)

cl.cam.ac.uk

Sergei Skorobogatov (June 2002). "Low temperature data remanence in static RAM". University of Cambridge, Computer Laboratory. doi:10.48456/tr-536. Archived from the original on 2019-01-18. Retrieved 2008-02-27.

computerhistory.org (Global: 2,702^nd place; English: 1,789^th place)

"1966: Semiconductor RAMs Serve High-speed Storage Needs". Computer History Museum. Archived from the original on 3 October 2019. Retrieved 19 June 2019.
"1970: MOS dynamic RAM competes with magnetic core memory on price". Computer History Museum. Archived from the original on 2021-10-26. Retrieved 2020-10-08.
Intel 64 bit static RAM rubylith: 6, c. 1970, archived from the original on 2023-01-28, retrieved 2023-01-28

digikey.com (Global: low place; English: low place)

media.digikey.com

"3.0V Core Async/Page PSRAM Memory" (PDF). Micron. Archived (PDF) from the original on 2018-08-24. Retrieved 2019-05-04.

doi.org (Global: 2^nd place; English: 2^nd place)

Sergei Skorobogatov (June 2002). "Low temperature data remanence in static RAM". University of Cambridge, Computer Laboratory. doi:10.48456/tr-536. Archived from the original on 2019-01-18. Retrieved 2008-02-27.
Rathi, Neetu; Kumar, Anil; Gupta, Neeraj; Singh, Sanjay Kumar (2023). "A Review of Low-Power Static Random Access Memory (SRAM) Designs". 2023 IEEE Devices for Integrated Circuit (DevIC). pp. 455–459. doi:10.1109/DevIC57758.2023.10134887. ISBN 979-8-3503-4726-5. S2CID 258984439.
Kulkarni, Jaydeep P.; Kim, Keejong; Roy, Kaushik (2007). "A 160 mV Robust Schmitt Trigger Based Subthreshold SRAM". IEEE Journal of Solid-State Circuits. 42 (10): 2303. Bibcode:2007IJSSC..42.2303K. doi:10.1109/JSSC.2007.897148. S2CID 699469.
"0.45-V operating Vt-variation tolerant 9T/18T dual-port SRAM". March 2011. pp. 1–4. doi:10.1109/ISQED.2011.5770728. S2CID 6397769. {{cite web}}: Missing or empty |url= (help)
Kabir, Hussain Mohammed Dipu; Chan, Mansun (January 2, 2015). "SRAM precharge system for reducing write power". HKIE Transactions. 22 (1): 1–8. doi:10.1080/1023697X.2014.970761. S2CID 108574841. Archived from the original on January 27, 2024. Retrieved January 27, 2024 – via CrossRef.
Torrens, Gabriel; Alorda, Bartomeu; Carmona, Cristian; Malagon-Perianez, Daniel; Segura, Jaume; Bota, Sebastia (2019). "A 65-nm Reliable 6T CMOS SRAM Cell with Minimum Size Transistors". IEEE Transactions on Emerging Topics in Computing. 7 (3): 447–455. arXiv:2411.18114. Bibcode:2019ITETC...7..447T. doi:10.1109/TETC.2017.2721932. ISSN 2168-6750.

eeherald.com (Global: low place; English: low place)

"Embedded Systems Course- module 15: SRAM memory interface to microcontroller in embedded systems". Archived from the original on 2024-04-16. Retrieved 2024-04-12.

eetimes.com (Global: 4,224^th place; English: 2,761^st place)

Walker, Andrew (December 17, 2018). "The Trouble with SRAM". EE Times.
Walker, Andrew (February 6, 2019). "The Race is On". EE Times. Archived from the original on November 30, 2021. Retrieved November 30, 2021.

espacenet.com (Global: 950^th place; English: 813^th place)

worldwide.espacenet.com

US 3354440A, Arnold S. Farber & Eugene S. Schlig, "Nondestructive memory array", issued 1967-11-21, assigned to IBM ^{[dead link]}
United States Patent 6975532: Quasi-static random access memory Archived 2023-01-29 at the Wayback Machine

freepatentsonline.com (Global: 7,823^rd place; English: 5,787^th place)

United States Patent 6975531: 6F2 3-transistor DRAM gain cell Archived 2020-08-07 at the Wayback Machine

illinois.edu (Global: 1,178^th place; English: 745^th place)

courses.engr.illinois.edu

Preston, Ronald P. (2001). "14: Register Files and Caches" (PDF). The Design of High Performance Microprocessor Circuits. IEEE Press. p. 290. Archived from the original (PDF) on 2013-05-09. Retrieved 2013-02-01.

intel.com (Global: 1,727^th place; English: 1,234^th place)

intel.com

Volk, Andrew M.; Stoll, Peter A.; Metrovich, Paul (First Quarter 2001). "Recollections of Early Chip Development at Intel" (PDF). Intel Technology Journal. 5 (1): 11. Archived (PDF) from the original on 2022-01-12. Retrieved 2024-01-23 – via Intel.

newsroom.intel.com

"Intel at 50: Intel's First Product – the 3101". Intel Newsroom. 2018-05-14. Archived from the original on 2023-02-01. Retrieved 2023-02-01.

kfupm.edu.sa (Global: low place; English: low place)

faculty.kfupm.edu.sa

"Memory lectures" (PDF).

oxfordjournals.org (Global: 1,550^th place; English: 3,406^th place)

ietele.oxfordjournals.org

"Area Optimization in 6T and 8T SRAM Cells Considering Vth Variation in Future Processes -- MORITA et al. E90-C (10): 1949 -- IEICE Transactions on Electronics". Archived from the original on 2008-12-05.

psu.edu (Global: 299^th place; English: 159^th place)

citeseerx.ist.psu.edu

"CiteSeerX". CiteSeerX.{{cite web}}: CS1 maint: miscellaneous url (link)

semanticscholar.org (Global: 15^th place; English: 8^th place)

api.semanticscholar.org

Rathi, Neetu; Kumar, Anil; Gupta, Neeraj; Singh, Sanjay Kumar (2023). "A Review of Low-Power Static Random Access Memory (SRAM) Designs". 2023 IEEE Devices for Integrated Circuit (DevIC). pp. 455–459. doi:10.1109/DevIC57758.2023.10134887. ISBN 979-8-3503-4726-5. S2CID 258984439.
Kulkarni, Jaydeep P.; Kim, Keejong; Roy, Kaushik (2007). "A 160 mV Robust Schmitt Trigger Based Subthreshold SRAM". IEEE Journal of Solid-State Circuits. 42 (10): 2303. Bibcode:2007IJSSC..42.2303K. doi:10.1109/JSSC.2007.897148. S2CID 699469.
"0.45-V operating Vt-variation tolerant 9T/18T dual-port SRAM". March 2011. pp. 1–4. doi:10.1109/ISQED.2011.5770728. S2CID 6397769. {{cite web}}: Missing or empty |url= (help)
Kabir, Hussain Mohammed Dipu; Chan, Mansun (January 2, 2015). "SRAM precharge system for reducing write power". HKIE Transactions. 22 (1): 1–8. doi:10.1080/1023697X.2014.970761. S2CID 108574841. Archived from the original on January 27, 2024. Retrieved January 27, 2024 – via CrossRef.

tandfonline.com (Global: 286^th place; English: 209^th place)

Kabir, Hussain Mohammed Dipu; Chan, Mansun (January 2, 2015). "SRAM precharge system for reducing write power". HKIE Transactions. 22 (1): 1–8. doi:10.1080/1023697X.2014.970761. S2CID 108574841. Archived from the original on January 27, 2024. Retrieved January 27, 2024 – via CrossRef.

tezzaron.com (Global: low place; English: low place)

"3T-iRAM(r) Technology". Archived from the original on 2018-08-13. Retrieved 2018-08-13.

ti.com (Global: 6,779^th place; English: 4,625^th place)

Shared Memory Interface with the TMS320C54x DSP (PDF), archived (PDF) from the original on 2019-05-04, retrieved 2019-05-04

wccftech.com (Global: 6,369^th place; English: 4,426^th place)

Fahad Arif (Apr 5, 2014). "Microsoft Says Xbox One's ESRAM is a "Huge Win" – Explains How it Allows Reaching 1080p/60 FPS". Archived from the original on 2020-03-24. Retrieved 2020-03-24.

web.archive.org (Global: 1^st place; English: 1^st place)

"1966: Semiconductor RAMs Serve High-speed Storage Needs". Computer History Museum. Archived from the original on 3 October 2019. Retrieved 19 June 2019.
"1970: MOS dynamic RAM competes with magnetic core memory on price". Computer History Museum. Archived from the original on 2021-10-26. Retrieved 2020-10-08.
Volk, Andrew M.; Stoll, Peter A.; Metrovich, Paul (First Quarter 2001). "Recollections of Early Chip Development at Intel" (PDF). Intel Technology Journal. 5 (1): 11. Archived (PDF) from the original on 2022-01-12. Retrieved 2024-01-23 – via Intel.
"Intel at 50: Intel's First Product – the 3101". Intel Newsroom. 2018-05-14. Archived from the original on 2023-02-01. Retrieved 2023-02-01.
Intel 64 bit static RAM rubylith: 6, c. 1970, archived from the original on 2023-01-28, retrieved 2023-01-28
Sergei Skorobogatov (June 2002). "Low temperature data remanence in static RAM". University of Cambridge, Computer Laboratory. doi:10.48456/tr-536. Archived from the original on 2019-01-18. Retrieved 2008-02-27.
Fahad Arif (Apr 5, 2014). "Microsoft Says Xbox One's ESRAM is a "Huge Win" – Explains How it Allows Reaching 1080p/60 FPS". Archived from the original on 2020-03-24. Retrieved 2020-03-24.
Shared Memory Interface with the TMS320C54x DSP (PDF), archived (PDF) from the original on 2019-05-04, retrieved 2019-05-04
"Homemade CPU – from scratch: Svarichevsky Mikhail". 3.14.by. Archived from the original on 2024-01-27. Retrieved 2024-01-27.
"Embedded Systems Course- module 15: SRAM memory interface to microcontroller in embedded systems". Archived from the original on 2024-04-16. Retrieved 2024-04-12.
"3.0V Core Async/Page PSRAM Memory" (PDF). Micron. Archived (PDF) from the original on 2018-08-24. Retrieved 2019-05-04.
United States Patent 6975532: Quasi-static random access memory Archived 2023-01-29 at the Wayback Machine
"Area Optimization in 6T and 8T SRAM Cells Considering Vth Variation in Future Processes -- MORITA et al. E90-C (10): 1949 -- IEICE Transactions on Electronics". Archived from the original on 2008-12-05.
Preston, Ronald P. (2001). "14: Register Files and Caches" (PDF). The Design of High Performance Microprocessor Circuits. IEEE Press. p. 290. Archived from the original (PDF) on 2013-05-09. Retrieved 2013-02-01.
United States Patent 6975531: 6F2 3-transistor DRAM gain cell Archived 2020-08-07 at the Wayback Machine
"3T-iRAM(r) Technology". Archived from the original on 2018-08-13. Retrieved 2018-08-13.
Kabir, Hussain Mohammed Dipu; Chan, Mansun (January 2, 2015). "SRAM precharge system for reducing write power". HKIE Transactions. 22 (1): 1–8. doi:10.1080/1023697X.2014.970761. S2CID 108574841. Archived from the original on January 27, 2024. Retrieved January 27, 2024 – via CrossRef.
Walker, Andrew (February 6, 2019). "The Race is On". EE Times. Archived from the original on November 30, 2021. Retrieved November 30, 2021.
Reda, Boumchedda (May 20, 2019). "Ultra-low voltage and energy efficient SRAM design with new technologies for IoT applications". Grenoble Alpes University. Archived from the original on November 30, 2021. Retrieved November 30, 2021.

worldcat.org (Global: 4^th place; English: 4^th place)

search.worldcat.org

Torrens, Gabriel; Alorda, Bartomeu; Carmona, Cristian; Malagon-Perianez, Daniel; Segura, Jaume; Bota, Sebastia (2019). "A 65-nm Reliable 6T CMOS SRAM Cell with Minimum Size Transistors". IEEE Transactions on Emerging Topics in Computing. 7 (3): 447–455. arXiv:2411.18114. Bibcode:2019ITETC...7..447T. doi:10.1109/TETC.2017.2721932. ISSN 2168-6750.

Static random-access memory (English Wikipedia)

14.by (Global: low place; English: low place)

3.14.by

adsabs.harvard.edu (Global: 14th place; English: 9th place)

ui.adsabs.harvard.edu

archive.org (Global: 6th place; English: 6th place)

archives-ouvertes.fr (Global: 1,143rd place; English: 973rd place)

tel.archives-ouvertes.fr

arxiv.org (Global: 49th place; English: 31st place)

berkeley.edu (Global: 621st place; English: 429th place)

www2.eecs.berkeley.edu

books.google.com (Global: 3rd place; English: 3rd place)

cam.ac.uk (Global: 569th place; English: 354th place)

cl.cam.ac.uk

computerhistory.org (Global: 2,702nd place; English: 1,789th place)

digikey.com (Global: low place; English: low place)

media.digikey.com

doi.org (Global: 2nd place; English: 2nd place)

eeherald.com (Global: low place; English: low place)

eetimes.com (Global: 4,224th place; English: 2,761st place)

espacenet.com (Global: 950th place; English: 813th place)

worldwide.espacenet.com

freepatentsonline.com (Global: 7,823rd place; English: 5,787th place)

illinois.edu (Global: 1,178th place; English: 745th place)

courses.engr.illinois.edu

intel.com (Global: 1,727th place; English: 1,234th place)

intel.com

newsroom.intel.com

kfupm.edu.sa (Global: low place; English: low place)

faculty.kfupm.edu.sa

oxfordjournals.org (Global: 1,550th place; English: 3,406th place)

ietele.oxfordjournals.org

psu.edu (Global: 299th place; English: 159th place)

citeseerx.ist.psu.edu

semanticscholar.org (Global: 15th place; English: 8th place)

api.semanticscholar.org

tandfonline.com (Global: 286th place; English: 209th place)

tezzaron.com (Global: low place; English: low place)

ti.com (Global: 6,779th place; English: 4,625th place)

wccftech.com (Global: 6,369th place; English: 4,426th place)

web.archive.org (Global: 1st place; English: 1st place)

worldcat.org (Global: 4th place; English: 4th place)

search.worldcat.org

adsabs.harvard.edu (Global: 14^th place; English: 9^th place)

archive.org (Global: 6^th place; English: 6^th place)

archives-ouvertes.fr (Global: 1,143^rd place; English: 973^rd place)

arxiv.org (Global: 49^th place; English: 31^st place)

berkeley.edu (Global: 621^st place; English: 429^th place)

books.google.com (Global: 3^rd place; English: 3^rd place)

cam.ac.uk (Global: 569^th place; English: 354^th place)

computerhistory.org (Global: 2,702^nd place; English: 1,789^th place)

doi.org (Global: 2^nd place; English: 2^nd place)

eetimes.com (Global: 4,224^th place; English: 2,761^st place)

espacenet.com (Global: 950^th place; English: 813^th place)

freepatentsonline.com (Global: 7,823^rd place; English: 5,787^th place)

illinois.edu (Global: 1,178^th place; English: 745^th place)

intel.com (Global: 1,727^th place; English: 1,234^th place)

oxfordjournals.org (Global: 1,550^th place; English: 3,406^th place)

psu.edu (Global: 299^th place; English: 159^th place)

semanticscholar.org (Global: 15^th place; English: 8^th place)

tandfonline.com (Global: 286^th place; English: 209^th place)

ti.com (Global: 6,779^th place; English: 4,625^th place)

wccftech.com (Global: 6,369^th place; English: 4,426^th place)

web.archive.org (Global: 1^st place; English: 1^st place)

worldcat.org (Global: 4^th place; English: 4^th place)