Synchronous dynamic random-access memory (English Wikipedia)

Analysis of information sources in references of the Wikipedia article "Synchronous dynamic random-access memory" in English language version.

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  • P. Darche (2020). Microprocessor: Prolegomenes – Calculation and Storage Functions – Calculation Models and Computer. John Wiley & Sons. p. 59. ISBN 9781786305633.
  • B. Jacob; S. W. Ng; D. T. Wang (2008). Memory Systems: Cache, DRAM, Disk. Morgan Kaufmann. p. 324. ISBN 9780080553849.
  • Jacob, B.; Ng, S. W.; Wang, D. T. (2008). Memory Systems: Cache, DRAM, Disk. Morgan Kaufmann. p. 333. ISBN 9780080553849.
  • "Electronic Design". Electronic Design. 41 (15–21). Hayden Publishing Company. 1993. The first commercial synchronous DRAM, the Samsung 16-Mbit KM48SL2000, employs a single-bank architecture that lets system designers easily transition from asynchronous to synchronous systems.

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  • Kalter, H. L.; Stapper, C. H.; Barth, J. E.; Dilorenzo, J.; Drake, C. E.; Fifield, J. A.; Kelley, G. A.; Lewis, S. C.; van der Hoeven, W. B.; Jankosky, J. A. (1990). "A 50-ns 16-Mb DRAM with a 10-ns data rate and on-chip ECC". IEEE Journal of Solid-State Circuits. 25 (5): 1118. Bibcode:1990IJSSC..25.1118K. doi:10.1109/4.62132.

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  • Kalter, H. L.; Stapper, C. H.; Barth, J. E.; Dilorenzo, J.; Drake, C. E.; Fifield, J. A.; Kelley, G. A.; Lewis, S. C.; van der Hoeven, W. B.; Jankosky, J. A. (1990). "A 50-ns 16-Mb DRAM with a 10-ns data rate and on-chip ECC". IEEE Journal of Solid-State Circuits. 25 (5): 1118. Bibcode:1990IJSSC..25.1118K. doi:10.1109/4.62132.

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  • "Memory". STOL (Semiconductor Technology Online). Retrieved 25 June 2019.

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  • "PU-18". PSXDEV. Retrieved 10 July 2019.

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