TOP500 (English Wikipedia)

Analysis of information sources in references of the Wikipedia article "TOP500" in English language version.

refsWebsite
Global rank English rank
1st place
1st place
7,602nd place
6,867th place
low place
low place
low place
8,965th place
low place
low place
7th place
7th place
9,964th place
6,992nd place
low place
low place
518th place
331st place
low place
8,197th place
14th place
14th place
low place
low place
2nd place
2nd place
5th place
5th place
low place
low place
28th place
26th place
20th place
30th place
1,241st place
1,069th place
low place
low place
6,358th place
4,781st place
5,534th place
4,538th place
3,410th place
2,939th place
low place
low place
38th place
40th place
low place
low place

anl.gov

archive.today

bbc.com

cloud.google.com

cnn.com

money.cnn.com

datacenterdynamics.com

doi.org

hoise.com

hpcwire.com

jlsrf.org

linuxfoundation.org

netlib.org

  • A. Petitet; R. C. Whaley; J. Dongarra; A. Cleary (24 February 2016). "HPL – A Portable Implementation of the High-Performance Linpack Benchmark for Distributed-Memory Computers". ICL – UTK Computer Science Department. Archived from the original on 2 November 2000. Retrieved 22 September 2016.
  • "Statistics on Manufacturers and Continents". Archived from the original on 18 September 2007. Retrieved 10 March 2007.

newsmaine.net

nextplatform.com

nytimes.com

ornl.gov

sciencenews.org

thefreelibrary.com

top500.org

tweaktown.com

web.archive.org

whitehouse.gov

wikichip.org

en.wikichip.org

fuse.wikichip.org

  • "The 2,048-core PEZY-SC2 sets a Green500 record". WikiChip Fuse. 1 November 2017. Archived from the original on 16 November 2017. Retrieved 15 November 2017. Powering the ZettaScaler-2.2 is the PEZY-SC2. The SC2 is a second-generation chip featuring twice as many cores – i.e., 2,048 cores with 8-way SMT for a total of 16,384 threads. […] The first-generation SC incorporated two ARM926 cores and while that was sufficient for basic management and debugging its processing power was inadequate for much more. The SC2 uses a hexa-core P-Class P6600 MIPS processor which share the same memory address as the PEZY cores, improving performance and reducing data transfer overhead. With the powerful MIPS management cores, it is now also possible to entirely eliminate the Xeon host processor. However, PEZY has not done so yet.

worldcat.org

search.worldcat.org

yahoo.com

finance.yahoo.com