Explicitly parallel instruction computing (Italian Wikipedia)

Analysis of information sources in references of the Wikipedia article "Explicitly parallel instruction computing" in Italian language version.

refsWebsite

Global rank Italian rank

5,952^nd place

low place

5^th place

26^th place

4,963^rd place

325^th place

1manufacturing-insights.com

low place

low place

1web.archive.org

1^st place

1^st place

clemson.edu (Global: 5,952^nd place; Italian: low place)

cs.clemson.edu

linea del tempo estratta da Historical background for HP/Intel EPIC and IA-64 -- Mark Smotherman

manufacturing-insights.com (Global: low place; Italian: low place)

Intel Brings Dual-Core Capabilities to Itanium 2 with Montecito Processor Archiviato il 27 settembre 2007 in Internet Archive.

unibo.it (Global: 4,963^rd place; Italian: 325^th place)

acnpsearch.unibo.it

Some scheduling techniques and an easily schedulable horizontal architecture for high performance scientific computing International Symposium on Microarchitecture archive Proceedings of the 14th annual workshop on Microprogramming table of contents Chatham, Massachusetts, United States Pages: 183 - 198 anno: 1981 ISSN 1050-916X (WC · ACNP)

web.archive.org (Global: 1^st place; Italian: 1^st place)

Intel Brings Dual-Core Capabilities to Itanium 2 with Montecito Processor Archiviato il 27 settembre 2007 in Internet Archive.

worldcat.org (Global: 5^th place; Italian: 26^th place)

Some scheduling techniques and an easily schedulable horizontal architecture for high performance scientific computing International Symposium on Microarchitecture archive Proceedings of the 14th annual workshop on Microprogramming table of contents Chatham, Massachusetts, United States Pages: 183 - 198 anno: 1981 ISSN 1050-916X (WC · ACNP)