AIアクセラレータ (Japanese Wikipedia)

Analysis of information sources in references of the Wikipedia article "AIアクセラレータ" in Japanese language version.

refsWebsite

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9doi.org

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6web.archive.org

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5arxiv.org

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4researchgate.net

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4nvidia.com

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3impress.co.jp

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2insidehpc.com

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2venturebeat.com

616^th place

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2academia.edu

121^st place

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2youtube.com

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1v3.co.uk

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1computerhistory.org

2,213^th place

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1berkeley.edu

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1lecun.com

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1teco.edu

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1intel.com

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1wired.jp

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1itmedia.co.jp

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1ascii.jp

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1isus.jp

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1inria.fr

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1igoro.com

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1nips.cc

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1nextplatform.com

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1microsoft.com

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1techreport.com

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1sciencedaily.com

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1jmlr.org

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1top500.org

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1tomshardware.com

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1cloud.google.com

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1github.com

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1riseml.com

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1harvard.edu

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1techcrunch.com

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1ft.com

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1nih.gov

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1phys.org

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1ufl.edu

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1qualcomm.com

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1siliconrepublic.com

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academia.edu

"A Survey of ReRAM-based Architectures for Processing-in-memory and Neural Networks", S. Mittal, Machine Learning and Knowledge Extraction, 2018
"A Survey of FPGA-based Accelerators for Convolutional Neural Networks", Mittal et al., NCAA, 2018

arxiv.org

De Fabritiis, G. (2007). “Performance of Cell processor for biomolecular simulations”. Computer Physics Communications 176 (11–12): 660–664. arXiv:physics/0611201. doi:10.1016/j.cpc.2007.02.107.
Rastegari, Mohammad; Ordonez, Vicente; Redmon, Joseph; Farhadi, Ali (2016). "XNOR-Net: ImageNet Classification Using Binary Convolutional Neural Networks". arXiv:1603.05279 [cs.CV]。
Joshua V. Dillon; Ian Langmore; Dustin Tran; Eugene Brevdo; Srinivas Vasudevan; Dave Moore; Brian Patton; Alex Alemi; Matt Hoffman; Rif A. Saurous (28 November 2017). TensorFlow Distributions (Report). arXiv:1711.10604. Bibcode:2017arXiv171110604D. Accessed 2018-05-23. All operations in TensorFlow Distributions are numerically stable across half, single, and double floating-point precisions (as TensorFlow dtypes: tf.bfloat16 (truncated floating point), tf.float16, tf.float32, tf.float64). Class constructors have a validate_args flag for numerical asserts
Abu Sebastian; Tomas Tuma; Nikolaos Papandreou; Manuel Le Gallo; Lukas Kull; Thomas Parnell; Evangelos Eleftheriou (2017). “Temporal correlation detection using computational phase-change memory”. Nature Communications 8. arXiv:1706.00511. doi:10.1038/s41467-017-01481-9. PMID 29062022.
Carlos Ríos; Nathan Youngblood; Zengguang Cheng; Manuel Le Gallo; Wolfram H.P. Pernice; C David Wright; Abu Sebastian; Harish Bhaskaran (2018). "In-memory computing on a photonic platform". arXiv:1801.06228 [cs.ET]。

ascii.jp

“Ryzen Pro 7000シリーズを発表、Ryzen AIはWindows 11で対応済み AMD CPUロードマップ (2/3)”. ASCII.jp. ASCII. 2023年6月22日閲覧。

berkeley.edu

people.eecs.berkeley.edu

“design of a connectionist network supercomputer”. 2020年10月19日閲覧。

cloud.google.com

“Available TensorFlow Ops | Cloud TPU | Google Cloud”. Google Cloud. 2018年5月23日閲覧。 “This page lists the TensorFlow Python APIs and graph operators available on Cloud TPU.”

computerhistory.org

“13 Sextillion & Counting: The Long & Winding Road to the Most Frequently Manufactured Human Artifact in History”. Computer History Museum (April 2, 2018). 28 July 2019閲覧。

doi.org

Ramacher, U.; Raab, W.; Hachmann, J.A.U.; Beichter, J.; Bruls, N.; Wesseling, M.; Sicheneder, E.; Glass, J. et al. (1995). Proceedings of 9th International Parallel Processing Symposium. pp. 774–781. doi:10.1109/IPPS.1995.395862. ISBN 978-0-8186-7074-9
Gschwind, M.; Salapura, V.; Maischberger, O. (1996). “A Generic Building Block for Hopfield Neural Networks with On-Chip Learning”. 1996 IEEE International Symposium on Circuits and Systems. Circuits and Systems Connecting the World. ISCAS 96. pp. 49–52. doi:10.1109/ISCAS.1996.598474. ISBN 0-7803-3073-0
Gschwind, Michael; Hofstee, H. Peter; Flachs, Brian; Hopkins, Martin; Watanabe, Yukio; Yamazaki, Takeshi (2006). “Synergistic Processing in Cell's Multicore Architecture”. IEEE Micro 26 (2): 10–24. doi:10.1109/MM.2006.41.
De Fabritiis, G. (2007). “Performance of Cell processor for biomolecular simulations”. Computer Physics Communications 176 (11–12): 660–664. arXiv:physics/0611201. doi:10.1016/j.cpc.2007.02.107.
Benthin, Carsten; Wald, Ingo; Scherbaum, Michael; Friedrich, Heiko (2006). 2006 IEEE Symposium on Interactive Ray Tracing. pp. 15–23. doi:10.1109/RT.2006.280210. ISBN 978-1-4244-0693-7
Kwon, Bomjun; Choi, Taiho; Chung, Heejin; Kim, Geonho (2008). 2008 5th IEEE Consumer Communications and Networking Conference. pp. 1030–1034. doi:10.1109/ccnc08.2007.235. ISBN 978-1-4244-1457-4
Duan, Rubing; Strey, Alfred (2008). Euro-Par 2008 – Parallel Processing. Lecture Notes in Computer Science. 5168. pp. 665–675. doi:10.1007/978-3-540-85451-7_71. ISBN 978-3-540-85450-0
Abu Sebastian; Tomas Tuma; Nikolaos Papandreou; Manuel Le Gallo; Lukas Kull; Thomas Parnell; Evangelos Eleftheriou (2017). “Temporal correlation detection using computational phase-change memory”. Nature Communications 8. arXiv:1706.00511. doi:10.1038/s41467-017-01481-9. PMID 29062022.
Marega, Guilherme Migliato; Zhao, Yanfei; Avsar, Ahmet; Wang, Zhenyu; Tripati, Mukesh; Radenovic, Aleksandra; Kis, Anras (2020). “Logic-in-memory based on an atomically thin semiconductor”. Nature 587 (2): 72-77. doi:10.1038/s41586-020-2861-0.

ft.com

“Subscribe to read | Financial Times”. www.ft.com. 2020年10月19日閲覧。

github.com

Tensorflow Authors (2018年2月28日). “ResNet-50 using BFloat16 on TPU”. Google. 2018年5月23日閲覧。^{[リンク切れ]}

harvard.edu

ui.adsabs.harvard.edu

Joshua V. Dillon; Ian Langmore; Dustin Tran; Eugene Brevdo; Srinivas Vasudevan; Dave Moore; Brian Patton; Alex Alemi; Matt Hoffman; Rif A. Saurous (28 November 2017). TensorFlow Distributions (Report). arXiv:1711.10604. Bibcode:2017arXiv171110604D. Accessed 2018-05-23. All operations in TensorFlow Distributions are numerically stable across half, single, and double floating-point precisions (as TensorFlow dtypes: tf.bfloat16 (truncated floating point), tf.float16, tf.float32, tf.float64). Class constructors have a validate_args flag for numerical asserts

igoro.com

“How GPU came to be used for general computation”. 2020年10月19日閲覧。

impress.co.jp

pc.watch.impress.co.jp

“【後藤弘茂のWeekly海外ニュース】 iPhone Xの深層学習コア「Neural Engine」の方向性”. PC Watch. 株式会社インプレス (2017年10月20日). 2023年6月22日閲覧。
“Intel新ロードマップを発表。Meteor Lake、Arrow Lake、Lunar Lakeへと進化”. PC Watch. 株式会社インプレス (2022年2月18日). 2023年6月22日閲覧。
IntelのMeteor Lake搭載ノート、dGPUなしでStable Diffusionを高速処理 - PC Watch

inria.fr

hal.inria.fr

“microsoft research/pixel shaders/MNIST”. 2020年10月19日閲覧。

insidehpc.com

“Inspurs unveils GX4 AI Accelerator” (2017年6月21日). 2020年7月23日閲覧。
“nvidia driving the development of deep learning” (2016年5月17日). 2020年7月23日閲覧。

intel.com

software.intel.com

“Improving the performance of video with AVX” (2012年2月8日). 2020年7月23日閲覧。

isus.jp

用語集 | iSUS

itmedia.co.jp

“x86初のAIプロセッサ「Ryzen AI」は何がスゴイのかAMDが説明市場投入第1弾は「Razer Blade 14」”. ITmedia PC USER. 2023年6月22日閲覧。

jmlr.org

“Deep Learning with Limited Numerical Precision”. 2020年7月23日閲覧。

lecun.com

yann.lecun.com

“Application of the ANNA Neural Network Chip to High-Speed Character Recognition”. 2020年10月19日閲覧。

microsoft.com

“Project Brainwave” (英語). Microsoft Research. 2020年6月16日閲覧。

nextplatform.com

“FPGA Based Deep Learning Accelerators Take on ASICs”. The Next Platform (2016年8月23日). 2016年9月7日閲覧。

nih.gov

pubmed.ncbi.nlm.nih.gov

Abu Sebastian; Tomas Tuma; Nikolaos Papandreou; Manuel Le Gallo; Lukas Kull; Thomas Parnell; Evangelos Eleftheriou (2017). “Temporal correlation detection using computational phase-change memory”. Nature Communications 8. arXiv:1706.00511. doi:10.1038/s41467-017-01481-9. PMID 29062022.

nips.cc

papers.nips.cc

“imagenet classification with deep convolutional neural networks”. 2020年10月19日閲覧。

nvidia.com

devblogs.nvidia.com

“how nvlink will enable faster easier multi GPU computing” (2014年11月14日). 2020年7月23日閲覧。
Harris, Mark (May 11, 2017). “CUDA 9 Features Revealed: Volta, Cooperative Groups and More”. August 12, 2017閲覧。

nvidia.com

“NVIDIA launches the World's First Graphics Processing Unit, the GeForce 256”. 2020年10月19日閲覧。
“Self-Driving Cars Technology & Solutions from NVIDIA Automotive”. NVIDIA. 2020年10月19日閲覧。

phys.org

“A new brain-inspired architecture could improve how computers handle data and advance AI”. American Institute of Physics. (2018年10月3日) 2018年10月5日閲覧。

qualcomm.com

“qualcomm research brings server class machine learning to every data devices” (October 2015). 2020年8月30日閲覧。

researchgate.net

"A Survey on Hardware Accelerators and Optimization Techniques for RNNs", JSA, 2020 PDF
“Space Efficient Neural Net Implementation”. 2020年10月19日閲覧。
"A Survey on Optimized Implementation of Deep Learning Models on the NVIDIA Jetson Platform", 2019
“Space Efficient Neural Net Implementation”. 2020年7月23日閲覧。

riseml.com

blog.riseml.com

Elmar Haußmann (2018年4月26日). “Comparing Google's TPUv2 against Nvidia's V100 on ResNet-50”. RiseML Blog. April 26, 2018時点のオリジナルよりアーカイブ。2018年5月23日閲覧。 “For the Cloud TPU, Google recommended we use the bfloat16 implementation from the official TPU repository with TensorFlow 1.7.0. Both the TPU and GPU implementations make use of mixed-precision computation on the respective architecture and store most tensors with half-precision.”

sciencedaily.com

“Chip could bring deep learning to mobile devices”. www.sciencedaily.com (2016年2月3日). 2016年9月13日閲覧。

siliconrepublic.com

“movidius powers worlds most intelligent drone” (2016年3月16日). 2020年8月30日閲覧。

techcrunch.com

social.techcrunch.com

“Facebook has a new job posting calling for chip designers”. 2020年10月19日閲覧。

techreport.com

“Google boosts machine learning with its Tensor Processing Unit” (2016年5月19日). 2016年9月13日閲覧。

teco.edu

“Development of an artificial neural network on a heterogeneous multicore architecture to predict a successful weight loss in obese individuals”. 2020年7月23日閲覧。

tomshardware.com

Lucian Armasu (2018年5月23日). “Intel To Launch Spring Crest, Its First Neural Network Processor, In 2019”. Tom's Hardware. 2018年5月23日閲覧。 “Intel said that the NNP-L1000 would also support bfloat16, a numerical format that’s being adopted by all the ML industry players for neural networks. The company will also support bfloat16 in its FPGAs, Xeons, and other ML products. The Nervana NNP-L1000 is scheduled for release in 2019.”

top500.org

Michael Feldman (2018年5月23日). “Intel Lays Out New Roadmap for AI Portfolio”. TOP500 Supercomputer Sites. 2018年5月23日閲覧。 “Intel plans to support this format across all their AI products, including the Xeon and FPGA lines”

ufl.edu

abe.ufl.edu

“design of a machine vision system for weed control”. June 23, 2010時点のオリジナルよりアーカイブ。June 17, 2016閲覧。

v3.co.uk

“Intel unveils Movidius Compute Stick USB AI Accelerator” (2017年7月21日). August 11, 2017時点のオリジナルよりアーカイブ。August 11, 2017閲覧。

venturebeat.com

Wiggers, Kyle (November 6, 2019), Neural Magic raises $15 million to boost AI inferencing speed on off-the-shelf processors, オリジナルの2020-03-06時点におけるアーカイブ。 2020年3月14日閲覧。
Khari Johnson (2018年5月23日). “Intel unveils Nervana Neural Net L-1000 for accelerated AI training”. VentureBeat. 2018年5月23日閲覧。 “...Intel will be extending bfloat16 support across our AI product lines, including Intel Xeon processors and Intel FPGAs.”

web.archive.org

“Intel unveils Movidius Compute Stick USB AI Accelerator” (2017年7月21日). August 11, 2017時点のオリジナルよりアーカイブ。August 11, 2017閲覧。
Wiggers, Kyle (November 6, 2019), Neural Magic raises $15 million to boost AI inferencing speed on off-the-shelf processors, オリジナルの2020-03-06時点におけるアーカイブ。 2020年3月14日閲覧。
“Google Developing AI Processors”. 2020年7月23日閲覧。Google using its own AI accelerators.
“nvidia introduces supercomputer for self driving cars” (2016年1月6日). 2020年7月23日閲覧。
Elmar Haußmann (2018年4月26日). “Comparing Google's TPUv2 against Nvidia's V100 on ResNet-50”. RiseML Blog. April 26, 2018時点のオリジナルよりアーカイブ。2018年5月23日閲覧。 “For the Cloud TPU, Google recommended we use the bfloat16 implementation from the official TPU repository with TensorFlow 1.7.0. Both the TPU and GPU implementations make use of mixed-precision computation on the respective architecture and store most tensors with half-precision.”
“design of a machine vision system for weed control”. June 23, 2010時点のオリジナルよりアーカイブ。June 17, 2016閲覧。

wired.jp

Nast, Condé (2017年9月21日). “アップルが開発した「ニューラルエンジン」は、人工知能でiPhoneに革新をもたらす”. WIRED.jp. 2023年6月22日閲覧。

youtube.com

“convolutional neural network demo from 1993 featuring DSP32 accelerator”. 2020年10月19日閲覧。
“The end of general purpose computers (not)”. 2020年7月23日閲覧。This presentation covers a past attempt at neural net accelerators, notes the similarity to the modern SLI GPGPU processor setup, and argues that general purpose vector accelerators are the way forward (in relation to RISC-V hwacha project. Argues that NN's are just dense and sparse matrices, one of several recurring algorithms)