Trader, Tiffany (19. juni 2016). «China Debuts 93-Petaflops ‘Sunway’ with Homegrown Processors». HPC Wire. Besøkt 21. juni 2016. «Each core of the CPE has a single floating point pipeline that can perform 8 flops per cycle per core (64-bit floating point arithmetic) and the MPE has a dual pipeline each of which can perform 8 flops per cycle per pipeline (64-bit floating point arithmetic).»