Itanium architecture for programmers: understanding 64-bit processors, page 313, 10.4.2 "used in software pipelining include the loop count (ar.lc) register (Section 5.6), the epilog count (ar.ec) register and special branch instructions to construct either counted or while loops using register rotation", 10.4.5 "Branch instructions for Software pipelining .. br.ctop, .. br.cexit.. br.wtop... br.wexit"
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Itanium processor microarchitecture
psu.edu PDFАрхивная копия от 5 марта 2016 на Wayback Machine H Sharangpani, K Arora - IEEE Micro, 2000
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Itanium processor microarchitecture
psu.edu PDFАрхивная копия от 5 марта 2016 на Wayback Machine H Sharangpani, K Arora - IEEE Micro, 2000