Wilk, G. D.; Wallace, R. M.; Anthony, J. M. (2001). "High-κ gate dielectrics: Current status and materials properties considerations". Journal of Applied Physics. 89 (10): 5243-5275. doi:10.1063/1.1361065.
Wanlass, F.; Sah, C. (1963). Nanowatt logic using field-effect metal-oxide semiconductor triodes. 1963 IEEE International Solid-State Circuits Conference (ISSCC). ss.32-33. doi:10.1109/isscc.1963.1157450.
Sah, Chih-Tang (1988). "Evolution of the MOS transistor-from conception to VLSI". Proceedings of the IEEE. 76 (10): 1280-1326. doi:10.1109/5.16328.
Deal, B. E.; Grove, A. S. (1965). "General Relationship for the Thermal Oxidation of Silicon". Journal of Applied Physics. 36 (12): 3770-3778. doi:10.1063/1.1713945.
Moore, Gordon E. (1965). "Cramming more components onto integrated circuits". IEEE Solid-State Circuits Society Newsletter. 11 (3): 33-35. doi:10.1109/n-ssc.2006.4785860.
Dennard, Robert H.; Gaensslen, Fritz H.; Yu, Hwa-Nien (1974). "Design of ion-implanted MOSFET's with very small physical dimensions". IEEE Journal of Solid-State Circuits. 9 (5): 256-268. doi:10.1109/jssc.1974.1050511.
Frank, D. J.; Dennard, R. H.; Nowak, E. (2001). "Device scaling limits of Si MOSFETs and their application dependencies". Proceedings of the IEEE. 89 (3): 259-288. doi:10.1109/5.915374.
Hofstein, S. R.; Heiman, F. P. (1963). "The silicon insulated-gate field-effect transistor". Proceedings of the IEEE. 51 (9): 1190-1202. doi:10.1109/proc.1963.2488.
Masuoka, F.; Momodomi, M.; Iwata, Y. (1987). New ultra high density EPROM and flash EEPROM with NAND structure cell. 1987 International Electron Devices Meeting (IEDM). ss.552-555. doi:10.1109/iedm.1987.191485.
Moore, Gordon E. (2006). "Progress in digital integrated electronics". IEEE Solid-State Circuits Society Newsletter. 11 (3): 36-37. doi:10.1109/n-ssc.2006.4804410.
Borkar, Shekhar; Chien, Andrew A. (2011). "The future of microprocessors". Communications of the ACM. 54 (5): 67-77. doi:10.1145/1941487.1941507.
Waldrop, M. Mitchell (2016). "The chips are down for Moore's law". Nature. 530 (7589): 144-147. doi:10.1038/530144a.
Loubet, Nicolas; Hook, Terence; Montanini, Pietro (2017). Stacked nanosheet gate-all-around transistor to enable scaling beyond FinFET. Symposium on VLSI Technology. ss.T230-T231. doi:10.23919/VLSIT.2017.7998183.
Auth, C.; Allen, C.; Blattner, A. (2012). A 22nm high performance and low-power CMOS technology featuring fully-depleted tri-gate transistors, self-aligned contacts and high density MIM capacitors. 2012 Symposium on VLSI Technology (VLSIT). ss.131-132. doi:10.1109/VLSIT.2012.6242496.
Wang, Xiaofei; Kim, Yusung; Baek, Gwang Hyeon (2025). A 0.021um2 High-Density SRAM in Intel-18A-RibbonFET Technology with PowerVia-Backside Power Delivery. 2025 IEEE International Solid-State Circuits Conference (ISSCC). ss.494-496. doi:10.1109/isscc49661.2025.10904657.
