RISC-V (Chinese Wikipedia)

Analysis of information sources in references of the Wikipedia article "RISC-V" in Chinese language version.

refsWebsite

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30web.archive.org

1^st place

8github.com

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5riscv.org

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3berkeley.edu

580^th place

642^nd place

2groups.google.com

1,518^th place

1,980^th place

1sina.com.cn

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1semiaccurate.com

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1acm.org

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809^th place

1doi.org

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1reuters.com

49^th place

81^st place

1pulp-platform.org

low place

1freebsd.org

5,469^th place

4,726^th place

1freebsdfoundation.blogspot.be

low place

1fedoraproject.org

low place

1sel4.systems

low place

1solidot.org

low place

754^th place

1sifive.com

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1andestech.com

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1theregister.com

3,700^th place

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1raw.githubusercontent.com

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1forbes.com

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acm.org

dl.acm.org

精簡指令集計算機的案例. ACM SIGARCH計算機體系結構新聞. 1980年10月, 8 (6): 25. doi:10.1145/641914.641917.

andestech.com

產品與解決方案. Andes Technology. [2023-07-28]. （原始内容存档于2023-07-28）（中文（臺灣））.

berkeley.edu

www-inst.eecs.berkeley.edu

Celio, Christopher. CS 152 Laboratory Exercise 3 (PDF). Regents of the University of California. [12 February 2015]. （原始内容 (PDF)存档于2016-06-23）.

www2.eecs.berkeley.edu

Krste Asanović, David A. Patterson. Instruction Sets Should Be Free: The Case For RISC-V (PDF). U.C. Berkeley Technical Reports. [2018-10-31]. （原始内容存档 (PDF)于2019-04-23）.

eecs.berkeley.edu

Waterman, Andrew. Improving Energy Efficiency and Reducing Code Size with RISC-V Compressed. U.C. Berkeley: Regents of the University of California. 13 May 2011: 32 [25 August 2014]. （原始内容存档于2014-08-26）.

doi.org

精簡指令集計算機的案例. ACM SIGARCH計算機體系結構新聞. 1980年10月, 8 (6): 25. doi:10.1145/641914.641917.

fedoraproject.org

Architectures/RISC-V. Fedora WIKI. Red Hat. [26 September 2016]. （原始内容存档于2021-01-24）.

forbes.com

RISC-V And Marvell Technologies Advances Enable Storage Solutions. [2021-09-25]. （原始内容存档于2021-09-25）.

freebsd.org

wiki.freebsd.org

FreeBSD Wiki: RISC-V. [2018-11-11]. （原始内容存档于2018-08-25）.

freebsdfoundation.blogspot.be

FreeBSD Foundation: Initial FreeBSD RISC-V Architecture Port Committed. [2018-11-11]. （原始内容存档于2018-04-04）.

github.com

Celio, Christopher. ucb-bar/riscv-sodor. Regents of the University of California. [12 February 2015]. （原始内容存档于2018-06-11）.
Waterman, Andrew; Asanović, Krste. The RISC-V Instruction Set Manual Volume II: Privileged Architecture Document Version 20211203 (PDF). RISC-V International. 3 December 2021 [5 November 2021].
Celio, Christopher. riscv-boom. GitHub. Regents of the University of California. [11 November 2016]. （原始内容存档于2018-06-11）.
Asanovic, Krste; et al. rocket-chip. GitHub. The RISC-V Foundation. [11 November 2016]. （原始内容存档于2015-04-03）.
openc910. Github. [2023-01-10]. （原始内容存档于2023-01-10）.
c910-llvm. Github. [2023-01-10]. （原始内容存档于2023-01-10）.
香山開源項目. [2021-07-06]. （原始内容存档于2021-07-24）.
Cores-SweRV 開源項目. [2021-09-25]. （原始内容存档于2022-05-07）.

groups.google.com

Montezelo, Manuel. Debian GNU/Linux port for RISC-V 64. Google Groups. Google. [19 July 2018]. （原始内容存档于2018-11-12）.
Begari, Padmarao. U-Boot port on RISC-V 32-bit is available. Google Groups. Microsemi. [15 February 2017]. （原始内容存档于2018-11-12）.

pulp-platform.org

Traber, Andreas; et al. PULP:Parallel Ultra Low Power. ETH Zurich, University of Bologna. [5 August 2016]. （原始内容存档于2023-01-21）.

raw.githubusercontent.com

香山：开源高性能RISC-V处理器 (PDF). [2022-05-16]. （原始内容 (PDF)存档于2021-07-06）.

reuters.com

U.S.-based chip-tech group moving to Switzerland over trade curb fears. Reuters. 2019-11-26 [2019-11-26]. （原始内容存档于2022-04-28）（英语）.

riscv.org

https://riscv.org/members/. [2021-05-01]. （原始内容存档于2021-04-26）. 缺少或|title=为空 (帮助)
RISC-V History - RISC-V International. RISC-V International. [2020-05-14]. （原始内容存档于2020-04-15）.
Waterman, Andrew; Asanović, Krste. The RISC-V Instruction Set Manual, Volume I: Base User-Level ISA version 2.2 (PDF). RISC-V International. 7 May 2017 [5 November 2021]. （原始内容存档 (PDF)于2023-04-13）.
riscv-angel. The RISC-V Foundation. [2018-11-11]. （原始内容存档于2018-11-11）.
Waterman, Andrew; et al. The RISC-V Compressed Instruction Set Manual Version 1.9 (draft) (PDF). RISC-V. [18 July 2016]. （原始内容存档 (PDF)于2016-11-08）.

sel4.systems

docs.sel4.systems

Almatary, Hesham. RISC-V, seL4. seL4 Documentation. CSIRO. [13 July 2018]. （原始内容存档于2023-01-18）.

semiaccurate.com

詳細了解ARM許可芯片的方法：第1部分. SemiAccurate. 2013 [2017-08-28]. （原始内容存档于2017-08-24）.

sifive.com

RISC-V Portfolio: SiFive Processors. SiFive. [2023-01-04]. （原始内容存档于2023-01-08）.

sina.com.cn

t.cj.sina.com.cn

新浪-图灵奖得主加入清華，牵头推动芯片开源

solidot.org

阿里巴巴发布首款 RISC-V 处理器. 科技行者. [2019-07-25]. （原始内容存档于2019-07-25）.

theregister.com

Chinese chip designers hope to topple Arm's Cortex-A76 with XiangShan RISC-V design. [2021-07-06]. （原始内容存档于2021-07-23）.

web.archive.org

Celio, Christopher. ucb-bar/riscv-sodor. Regents of the University of California. [12 February 2015]. （原始内容存档于2018-06-11）.
Celio, Christopher. CS 152 Laboratory Exercise 3 (PDF). Regents of the University of California. [12 February 2015]. （原始内容 (PDF)存档于2016-06-23）.
詳細了解ARM許可芯片的方法：第1部分. SemiAccurate. 2013 [2017-08-28]. （原始内容存档于2017-08-24）.
https://riscv.org/members/. [2021-05-01]. （原始内容存档于2021-04-26）. 缺少或|title=为空 (帮助)
U.S.-based chip-tech group moving to Switzerland over trade curb fears. Reuters. 2019-11-26 [2019-11-26]. （原始内容存档于2022-04-28）（英语）.
RISC-V History - RISC-V International. RISC-V International. [2020-05-14]. （原始内容存档于2020-04-15）.
Krste Asanović, David A. Patterson. Instruction Sets Should Be Free: The Case For RISC-V (PDF). U.C. Berkeley Technical Reports. [2018-10-31]. （原始内容存档 (PDF)于2019-04-23）.
Waterman, Andrew; Asanović, Krste. The RISC-V Instruction Set Manual, Volume I: Base User-Level ISA version 2.2 (PDF). RISC-V International. 7 May 2017 [5 November 2021]. （原始内容存档 (PDF)于2023-04-13）.
Celio, Christopher. riscv-boom. GitHub. Regents of the University of California. [11 November 2016]. （原始内容存档于2018-06-11）.
Asanovic, Krste; et al. rocket-chip. GitHub. The RISC-V Foundation. [11 November 2016]. （原始内容存档于2015-04-03）.
Traber, Andreas; et al. PULP:Parallel Ultra Low Power. ETH Zurich, University of Bologna. [5 August 2016]. （原始内容存档于2023-01-21）.
FreeBSD Wiki: RISC-V. [2018-11-11]. （原始内容存档于2018-08-25）.
FreeBSD Foundation: Initial FreeBSD RISC-V Architecture Port Committed. [2018-11-11]. （原始内容存档于2018-04-04）.
Montezelo, Manuel. Debian GNU/Linux port for RISC-V 64. Google Groups. Google. [19 July 2018]. （原始内容存档于2018-11-12）.
Architectures/RISC-V. Fedora WIKI. Red Hat. [26 September 2016]. （原始内容存档于2021-01-24）.
Begari, Padmarao. U-Boot port on RISC-V 32-bit is available. Google Groups. Microsemi. [15 February 2017]. （原始内容存档于2018-11-12）.
Almatary, Hesham. RISC-V, seL4. seL4 Documentation. CSIRO. [13 July 2018]. （原始内容存档于2023-01-18）.
riscv-angel. The RISC-V Foundation. [2018-11-11]. （原始内容存档于2018-11-11）.
Waterman, Andrew. Improving Energy Efficiency and Reducing Code Size with RISC-V Compressed. U.C. Berkeley: Regents of the University of California. 13 May 2011: 32 [25 August 2014]. （原始内容存档于2014-08-26）.
Waterman, Andrew; et al. The RISC-V Compressed Instruction Set Manual Version 1.9 (draft) (PDF). RISC-V. [18 July 2016]. （原始内容存档 (PDF)于2016-11-08）.
阿里巴巴发布首款 RISC-V 处理器. 科技行者. [2019-07-25]. （原始内容存档于2019-07-25）.
openc910. Github. [2023-01-10]. （原始内容存档于2023-01-10）.
c910-llvm. Github. [2023-01-10]. （原始内容存档于2023-01-10）.
RISC-V Portfolio: SiFive Processors. SiFive. [2023-01-04]. （原始内容存档于2023-01-08）.
產品與解決方案. Andes Technology. [2023-07-28]. （原始内容存档于2023-07-28）（中文（臺灣））.
香山開源項目. [2021-07-06]. （原始内容存档于2021-07-24）.
Chinese chip designers hope to topple Arm's Cortex-A76 with XiangShan RISC-V design. [2021-07-06]. （原始内容存档于2021-07-23）.
香山：开源高性能RISC-V处理器 (PDF). [2022-05-16]. （原始内容 (PDF)存档于2021-07-06）.
Cores-SweRV 開源項目. [2021-09-25]. （原始内容存档于2022-05-07）.
RISC-V And Marvell Technologies Advances Enable Storage Solutions. [2021-09-25]. （原始内容存档于2021-09-25）.