独热 (Chinese Wikipedia)

Analysis of information sources in references of the Wikipedia article "独热" in Chinese language version.

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arxiv.org

Event Extraction Based on Deep Learning in Food Hazard Arabic Texts. arXiv:2008.05014 .

梁, 杰; 陈, 嘉豪; 张, 雪芹; 周, 悦; 林, 家骏. 基于独热编码和卷积神经网络的异常检测. 清华大学学报 (自然科学版). 2019, 59 (07): 523–529 [2022-05-22]. doi:10.16511/j.cnki.qhdxxb.2018.25.061. （原始内容存档于2022-05-31）.

梁, 杰; 陈, 嘉豪; 张, 雪芹; 周, 悦; 林, 家骏. 基于独热编码和卷积神经网络的异常检测. 清华大学学报 (自然科学版). 2019, 59 (07): 523–529 [2022-05-22]. doi:10.16511/j.cnki.qhdxxb.2018.25.061. （原始内容存档于2022-05-31）.
Arnaud, Émilien; Elbattah, Mahmoud; Gignon, Maxime; Dequen, Gilles. NLP-Based Prediction of Medical Specialties at Hospital Admission Using Triage Notes. 2021 IEEE 9th International Conference on Healthcare Informatics (ICHI). Victoria, British Columbia: 548–553. 2021-08 [2022-05-22]. doi:10.1109/ICHI52183.2021.00103. （原始内容存档于2022-06-04）.

Arnaud, Émilien; Elbattah, Mahmoud; Gignon, Maxime; Dequen, Gilles. NLP-Based Prediction of Medical Specialties at Hospital Admission Using Triage Notes. 2021 IEEE 9th International Conference on Healthcare Informatics (ICHI). Victoria, British Columbia: 548–553. 2021-08 [2022-05-22]. doi:10.1109/ICHI52183.2021.00103. （原始内容存档于2022-06-04）.

梁, 杰; 陈, 嘉豪; 张, 雪芹; 周, 悦; 林, 家骏. 基于独热编码和卷积神经网络的异常检测. 清华大学学报 (自然科学版). 2019, 59 (07): 523–529 [2022-05-22]. doi:10.16511/j.cnki.qhdxxb.2018.25.061. （原始内容存档于2022-05-31）.
Xilinx Inc. Appendix A Accelerate FPGA Macros with One-Hot Approach. HDL Synthesis for FPGAs Design Guide (PDF). 1995 [2019-09-09]. （原始内容存档 (PDF)于2020-05-15）（英语）.
Xilinx Inc. Section 3-13. Encoding State Machines. HDL Synthesis for FPGAs Design Guide (PDF). 1995 [2019-09-09]. （原始内容存档 (PDF)于2020-05-15）（英语）.
Arnaud, Émilien; Elbattah, Mahmoud; Gignon, Maxime; Dequen, Gilles. NLP-Based Prediction of Medical Specialties at Hospital Admission Using Triage Notes. 2021 IEEE 9th International Conference on Healthcare Informatics (ICHI). Victoria, British Columbia: 548–553. 2021-08 [2022-05-22]. doi:10.1109/ICHI52183.2021.00103. （原始内容存档于2022-06-04）.

Xilinx Inc. Appendix A Accelerate FPGA Macros with One-Hot Approach. HDL Synthesis for FPGAs Design Guide (PDF). 1995 [2019-09-09]. （原始内容存档 (PDF)于2020-05-15）（英语）.
Xilinx Inc. Section 3-13. Encoding State Machines. HDL Synthesis for FPGAs Design Guide (PDF). 1995 [2019-09-09]. （原始内容存档 (PDF)于2020-05-15）（英语）.