高頻寬記憶體 (Chinese Wikipedia)

Analysis of information sources in references of the Wikipedia article "高頻寬記憶體" in Chinese language version.

refsWebsite

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26web.archive.org

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6anandtech.com

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3jedec.org

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3skhynix.com

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2semiengineering.com

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2eetimes.com

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2amd.com

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2arstechnica.com

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2samsung.com

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1tomshardware.com

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1isscc.org

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1enterprisetech.com

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1setphaserstostun.org

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1ieee.org

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1harvard.edu

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1semanticscholar.org

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1doi.org

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1utah.edu

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1vrworld.com

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1extremetech.com

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1techpowerup.com

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1techreport.com

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1computerbase.de

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1youtube.com

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1nvidia.com

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amd.com

High-Bandwidth Memory (HBM) (PDF). AMD. 2015-01-01 [2016-08-10]. （原始内容存档 (PDF)于2019-03-18）.
[2] （页面存档备份，存于互联网档案馆） AMD Ushers in a New Era of PC Gaming including World’s First Graphics Family with Revolutionary HBM Technology

anandtech.com

Smith, Ryan. The AMD Radeon R9 Fury X Review. Anandtech. 2015-07-02 [2016-08-01]. （原始内容存档于2016-07-22）.
Smith, Ryan. AMD Dives Deep On High Bandwidth Memory – What Will HBM Bring to AMD?. Anandtech. 2015-05-19 [2017-05-12]. （原始内容存档于2017-05-05）.
Shilov, Anton. SK Hynix Adds HBM2 to Catalog. Anandtech. 2016-08-01 [2016-08-01]. （原始内容存档于2016-08-02）.
Smith, Ryan. AMD HBM Deep Dive. Anandtech. 2015-05-19 [2016-08-01]. （原始内容存档于2016-08-11）.
Smith, Ryan. Nvidia announces Tesla P100 Accelerator. Anandtech. 2016-04-05 [2016-08-01]. （原始内容存档于2016-07-30）.
Smith, Ryan. Hot Chips 2016: Memory Vendors Discuss Ideas for Future Memory Tech – DDR5, Cheap HBM & More. Anandtech. 2016-08-23 [2016-08-23]. （原始内容存档于2016-08-24）.

arstechnica.com

Walton, Mark. HBM3: Cheaper, up to 64GB on-package, and terabytes-per-second bandwidth. Ars Technica. 2016-08-23 [2017-02-03]. （原始内容存档于2017-02-02）.
Walton, Mark. HBM3: Cheaper, up to 64GB on-package, and terabytes-per-second bandwidth. Ars Technica. 2016-08-23 [2016-08-23]. （原始内容存档于2016-08-23）.

computerbase.de

存档副本. [2019-07-08]. （原始内容存档于2019-04-01）.

doi.org

Sohn et.al. (Samsung). A 1.2 V 20 nm 307 GB/s HBM DRAM With At-Speed Wafer-Level IO Test Scheme and Adaptive Refresh Considering Temperature Distribution. IEEE Journal of Solid-State Circuits. January 2017, 52 (1): 250–260. Bibcode:2017IJSSC..52..250S. S2CID 207783774. doi:10.1109/JSSC.2016.2602221.

eetimes.com

Where Are DRAM Interfaces Headed? 互联网档案馆的存檔，存档日期2018-06-15. // EETimes, 4/18/2014 "The Hybrid Memory Cube (HMC) and a competing technology called High-Bandwidth Memory (HBM) are aimed at computing and networking applications. These approaches stack multiple DRAM chips atop a logic chip."
Where Are DRAM Interfaces Headed? （页面存档备份，存于互联网档案馆） // EETimes, 4/18/2014 "The Hybrid Memory Cube (HMC) and a competing technology called High-Bandwidth Memory (HBM) are aimed at computing and networking applications. These approaches stack multiple DRAM chips atop a logic chip."

enterprisetech.com

Morgan, Timothy Prickett. Future Nvidia ‘Pascal’ GPUs Pack 3D Memory, Homegrown Interconnect. EnterpriseTech. 2014-03-25 [2014-08-26]. （原始内容存档于2014-08-26）. Nvidia will be adopting the High Bandwidth Memory (HBM) variant of stacked DRAM that was developed by AMD and Hynix

extremetech.com

Samsung announces mass production of next-generation HBM2 memory – ExtremeTech. 2016-01-19 [2019-07-08]. （原始内容存档于2019-07-14）.

harvard.edu

ui.adsabs.harvard.edu

Sohn et.al. (Samsung). A 1.2 V 20 nm 307 GB/s HBM DRAM With At-Speed Wafer-Level IO Test Scheme and Adaptive Refresh Considering Temperature Distribution. IEEE Journal of Solid-State Circuits. January 2017, 52 (1): 250–260. Bibcode:2017IJSSC..52..250S. S2CID 207783774. doi:10.1109/JSSC.2016.2602221.

ieee.org

ieeexplore.ieee.org

Sohn et.al. (Samsung). A 1.2 V 20 nm 307 GB/s HBM DRAM With At-Speed Wafer-Level IO Test Scheme and Adaptive Refresh Considering Temperature Distribution. IEEE Journal of Solid-State Circuits. January 2017, 52 (1): 250–260. Bibcode:2017IJSSC..52..250S. S2CID 207783774. doi:10.1109/JSSC.2016.2602221.

isscc.org

ISSCC 2014 Trends 互联网档案馆的存檔，存档日期2015-02-06. page 118 "High-Bandwidth DRAM"

jedec.org

High Bandwidth Memory (HBM) DRAM (JESD235) （页面存档备份，存于互联网档案馆）, JEDEC, October 2013
JESD235a: High Bandwidth Memory 2. 2016-01-12 [2017-06-04]. （原始内容存档于2019-06-07）.
JEDEC Updates Groundbreaking High Bandwidth Memory (HBM) Standard (新闻稿). JEDEC. 2018-12-17 [2018-12-18]. （原始内容存档于2018-12-18）.

nvidia.com

NVIDIA Tesla P100: The Most Advanced Data Center GPU Ever Built. www.nvidia.com. [2019-07-08]. （原始内容存档于2018-05-13）.

samsung.com

news.samsung.com

Samsung Begins Mass Producing World’s Fastest DRAM – Based on Newest High Bandwidth Memory (HBM) Interface. news.samsung.com. [2019-07-08]. （原始内容存档于2019-06-21）.

samsung.com

Samsung Electronics Introduces New High Bandwidth Memory Technology Tailored to Data Centers, Graphic Applications, and AI | Samsung Semiconductor Global Website. www.samsung.com. [2019-08-22] （英语）.

semanticscholar.org

api.semanticscholar.org

Sohn et.al. (Samsung). A 1.2 V 20 nm 307 GB/s HBM DRAM With At-Speed Wafer-Level IO Test Scheme and Adaptive Refresh Considering Temperature Distribution. IEEE Journal of Solid-State Circuits. January 2017, 52 (1): 250–260. Bibcode:2017IJSSC..52..250S. S2CID 207783774. doi:10.1109/JSSC.2016.2602221.

semiengineering.com

What's Next for High Bandwidth Memory. 17 December 2019.
Interposers.

setphaserstostun.org

HBM: Memory Solution for Bandwidth-Hungry Processors 互联网档案馆的存檔，存档日期2015-04-24., Joonyoung Kim and Younsu Kim, SK Hynix // Hot Chips 26, August 2014

skhynix.com

History: 2010s. SK Hynix. [7 March 2023].
SK Hynix Develops World's Fastest High Bandwidth Memory, HBM2E. www.skhynix.com. August 12, 2019 [2019-08-22].

news.skhynix.com

SK hynix Starts Mass-Production of High-Speed DRAM, "HBM2E". 2 July 2020.

techpowerup.com

SK Hynix Announces its HBM2E Memory Products, 460 GB/S and 16GB per Stack.

techreport.com

Ferriera, Bruno. HBM3 and GDDR6 emerge fresh from the oven of Hot Chips. Tech Report. 2016-08-23 [2017-02-03]. （原始内容存档于2017-02-04）.

tomshardware.com

Shilov, Anton. Intel Confirms On-Package HBM Memory Support for Sapphire Rapids. Tom's Hardware. December 30, 2020 [January 1, 2021] （美国英语）.

utah.edu

cs.utah.edu

Highlights of the HighBandwidth Memory (HBM) Standard （页面存档备份，存于互联网档案馆）. Mike O’Connor, Sr. Research Scientist, NVidia // The Memory Forum – June 14, 2014

vrworld.com

Valich, Theo. NVIDIA Unveils Pascal GPU: 16GB of memory, 1TB/s Bandwidth. VR World. [2016-01-24]. （原始内容存档于2019-07-14）.

web.archive.org

ISSCC 2014 Trends 互联网档案馆的存檔，存档日期2015-02-06. page 118 "High-Bandwidth DRAM"
Smith, Ryan. The AMD Radeon R9 Fury X Review. Anandtech. 2015-07-02 [2016-08-01]. （原始内容存档于2016-07-22）.
Morgan, Timothy Prickett. Future Nvidia ‘Pascal’ GPUs Pack 3D Memory, Homegrown Interconnect. EnterpriseTech. 2014-03-25 [2014-08-26]. （原始内容存档于2014-08-26）. Nvidia will be adopting the High Bandwidth Memory (HBM) variant of stacked DRAM that was developed by AMD and Hynix
High Bandwidth Memory (HBM) DRAM (JESD235) （页面存档备份，存于互联网档案馆）, JEDEC, October 2013
JESD235a: High Bandwidth Memory 2. 2016-01-12 [2017-06-04]. （原始内容存档于2019-06-07）.
HBM: Memory Solution for Bandwidth-Hungry Processors 互联网档案馆的存檔，存档日期2015-04-24., Joonyoung Kim and Younsu Kim, SK Hynix // Hot Chips 26, August 2014
Where Are DRAM Interfaces Headed? 互联网档案馆的存檔，存档日期2018-06-15. // EETimes, 4/18/2014 "The Hybrid Memory Cube (HMC) and a competing technology called High-Bandwidth Memory (HBM) are aimed at computing and networking applications. These approaches stack multiple DRAM chips atop a logic chip."
Where Are DRAM Interfaces Headed? （页面存档备份，存于互联网档案馆） // EETimes, 4/18/2014 "The Hybrid Memory Cube (HMC) and a competing technology called High-Bandwidth Memory (HBM) are aimed at computing and networking applications. These approaches stack multiple DRAM chips atop a logic chip."
Highlights of the HighBandwidth Memory (HBM) Standard （页面存档备份，存于互联网档案馆）. Mike O’Connor, Sr. Research Scientist, NVidia // The Memory Forum – June 14, 2014
Smith, Ryan. AMD Dives Deep On High Bandwidth Memory – What Will HBM Bring to AMD?. Anandtech. 2015-05-19 [2017-05-12]. （原始内容存档于2017-05-05）.
High-Bandwidth Memory (HBM) (PDF). AMD. 2015-01-01 [2016-08-10]. （原始内容存档 (PDF)于2019-03-18）.
Valich, Theo. NVIDIA Unveils Pascal GPU: 16GB of memory, 1TB/s Bandwidth. VR World. [2016-01-24]. （原始内容存档于2019-07-14）.
Samsung Begins Mass Producing World’s Fastest DRAM – Based on Newest High Bandwidth Memory (HBM) Interface. news.samsung.com. [2019-07-08]. （原始内容存档于2019-06-21）.
Samsung announces mass production of next-generation HBM2 memory – ExtremeTech. 2016-01-19 [2019-07-08]. （原始内容存档于2019-07-14）.
Shilov, Anton. SK Hynix Adds HBM2 to Catalog. Anandtech. 2016-08-01 [2016-08-01]. （原始内容存档于2016-08-02）.
JEDEC Updates Groundbreaking High Bandwidth Memory (HBM) Standard (新闻稿). JEDEC. 2018-12-17 [2018-12-18]. （原始内容存档于2018-12-18）.
Walton, Mark. HBM3: Cheaper, up to 64GB on-package, and terabytes-per-second bandwidth. Ars Technica. 2016-08-23 [2017-02-03]. （原始内容存档于2017-02-02）.
Ferriera, Bruno. HBM3 and GDDR6 emerge fresh from the oven of Hot Chips. Tech Report. 2016-08-23 [2017-02-03]. （原始内容存档于2017-02-04）.
存档副本. [2019-07-08]. （原始内容存档于2019-04-01）.
[1] （页面存档备份，存于互联网档案馆） High-Bandwidth Memory (HBM) from AMD: Making Beautiful Memory
Smith, Ryan. AMD HBM Deep Dive. Anandtech. 2015-05-19 [2016-08-01]. （原始内容存档于2016-08-11）.
[2] （页面存档备份，存于互联网档案馆） AMD Ushers in a New Era of PC Gaming including World’s First Graphics Family with Revolutionary HBM Technology
Smith, Ryan. Nvidia announces Tesla P100 Accelerator. Anandtech. 2016-04-05 [2016-08-01]. （原始内容存档于2016-07-30）.
NVIDIA Tesla P100: The Most Advanced Data Center GPU Ever Built. www.nvidia.com. [2019-07-08]. （原始内容存档于2018-05-13）.
Smith, Ryan. Hot Chips 2016: Memory Vendors Discuss Ideas for Future Memory Tech – DDR5, Cheap HBM & More. Anandtech. 2016-08-23 [2016-08-23]. （原始内容存档于2016-08-24）.
Walton, Mark. HBM3: Cheaper, up to 64GB on-package, and terabytes-per-second bandwidth. Ars Technica. 2016-08-23 [2016-08-23]. （原始内容存档于2016-08-23）.

youtube.com

[1] （页面存档备份，存于互联网档案馆） High-Bandwidth Memory (HBM) from AMD: Making Beautiful Memory