Reduced Instruction Set Computer (German Wikipedia)

Analysis of information sources in references of the Wikipedia article "Reduced Instruction Set Computer" in German language version.

Last modified: 22:14:00, 11 August 2026 (UTC)

Ref.Un. Ref.Website

Global rank German rank

2^nd place

3^rd place

1,200^th place

2,201^st place

1,850^th place

2,733^rd place

905^th place

50^th place

6,514^th place

5,008^th place

1^st place

acm.org (Global: 1,200^th place; German: 2,201^st place)

David A. Patterson, David R. Ditzel: The case for the reduced instruction set computer. In: Readings in computer architecture. Morgan Kaufmann Publishers Inc., San Francisco, CA, USA 2000, ISBN 978-1-55860-539-8, S. 135–143, doi:10.1145/641914.641917 (englisch, acm.org [PDF; abgerufen am 12. September 2021]).

David A. Patterson, Carlo H. Sequin: RISC I: a reduced instruction set VLSI computer. In: 25 years of the international symposia on Computer architecture (selected papers) (= ISCA ’98). Association for Computing Machinery, New York, NY, USA 1998, ISBN 978-1-58113-058-4, S. 216–230, doi:10.1145/285930.285981.
David A. Patterson, David R. Ditzel: The case for the reduced instruction set computer. In: Readings in computer architecture. Morgan Kaufmann Publishers Inc., San Francisco, CA, USA 2000, ISBN 978-1-55860-539-8, S. 135–143, doi:10.1145/641914.641917 (englisch, acm.org [PDF; abgerufen am 12. September 2021]).
David A. Patterson: Reduced instruction set computers. In: Communications of the ACM. Band 28, Nr. 1, 2. Januar 1985, S. 8–21, doi:10.1145/2465.214917 (englisch).
John Cocke, V. Markstein: The evolution of RISC technology at IBM. In: IBM Journal of Research and Development. Band 34, Nr. 1, Januar 1990, S. 4–11, doi:10.1147/rd.341.0004 (englisch).
M. Alsup: Motorola’s 88000 family architecture. In: IEEE Micro. Band 10, Nr. 3, Juni 1990, S. 48–66, doi:10.1109/40.56325 (englisch).

OpenCore – OpenRISC (Memento vom 24. August 2011 im Internet Archive) – Artikel bei PPCNUX, vom 28. Juni 2011.