Reduced Instruction Set Computer (German Wikipedia)

Analysis of information sources in references of the Wikipedia article "Reduced Instruction Set Computer" in German language version.

refsWebsite
Global rank German rank
2nd place
3rd place
4,773rd place
4,525th place
1,185th place
2,009th place
1,383rd place
1,948th place
766th place
46th place
1st place
1st place

acm.org

dl.acm.org

  • David A. Patterson, David R. Ditzel: The case for the reduced instruction set computer. In: Readings in computer architecture. Morgan Kaufmann Publishers Inc., San Francisco, CA, USA 2000, ISBN 978-1-55860-539-8, S. 135–143, doi:10.1145/641914.641917 (englisch, acm.org [PDF; abgerufen am 12. September 2021]).

anandtech.com

arm.com

doi.org

  • David A. Patterson, Carlo H. Sequin: RISC I: a reduced instruction set VLSI computer. In: 25 years of the international symposia on Computer architecture (selected papers) (= ISCA ’98). Association for Computing Machinery, New York, NY, USA 1998, ISBN 978-1-58113-058-4, S. 216–230, doi:10.1145/285930.285981.
  • David A. Patterson, David R. Ditzel: The case for the reduced instruction set computer. In: Readings in computer architecture. Morgan Kaufmann Publishers Inc., San Francisco, CA, USA 2000, ISBN 978-1-55860-539-8, S. 135–143, doi:10.1145/641914.641917 (englisch, acm.org [PDF; abgerufen am 12. September 2021]).
  • David A. Patterson: Reduced instruction set computers. In: Communications of the ACM. Band 28, Nr. 1, 2. Januar 1985, S. 8–21, doi:10.1145/2465.214917 (englisch).
  • John Cocke, V. Markstein: The evolution of RISC technology at IBM. In: IBM Journal of Research and Development. Band 34, Nr. 1, Januar 1990, S. 4–11, doi:10.1147/rd.341.0004 (englisch).
  • M. Alsup: Motorola’s 88000 family architecture. In: IEEE Micro. Band 10, Nr. 3, Juni 1990, S. 48–66, doi:10.1109/40.56325 (englisch).
  • M. Alsup: Motorola’s 88000 family architecture. In: IEEE Micro. Band 10, Nr. 3, Juni 1990, S. 48–66, doi:10.1109/40.56325 (englisch).

heise.de

web.archive.org