Adder (electronics) (English Wikipedia)

Feynman, Richard P. (1986). "Quantum mechanical computers". Foundations of Physics. 16 (6). Springer Science and Business Media LLC: 507–531. Bibcode:1986FoPh...16..507F. doi:10.1007/bf01886518. ISSN 0015-9018. S2CID 122076550.
Dibyendu Chatterjee, Arijit Roy (2015). "A transmon-based quantum half-adder scheme". Progress of Theoretical and Experimental Physics. 2015 (9): 093A02. Bibcode:2015PTEP.2015i3A02C. doi:10.1093/ptep/ptv122.
Ruiz-Perez, Lidia; Juan Carlos, Garcia-Escartin (2 May 2017). "Quantum arithmetic with the quantum Fourier transform". Quantum Information Processing. 16 (6): 152. arXiv:1411.5949v2. Bibcode:2017QuIP...16..152R. doi:10.1007/s11128-017-1603-1. S2CID 10948948.
Şahin, Engin (2020). "Quantum arithmetic operations based on quantum Fourier transform on signed integers". International Journal of Quantum Information. 18 (6): 2050035. arXiv:2005.00443v3. Bibcode:2020IJQI...1850035S. doi:10.1142/s0219749920500355. ISSN 1793-6918.

archive.org (Global: 6^th place; English: 6^th place)

Mano, M. Morris (1979). Digital Logic and Computer Design. Prentice-Hall. pp. 119–123. ISBN 978-0-13-214510-7. OCLC 1413827071.

arxiv.org (Global: 49^th place; English: 31^st place)

Draper, Thomas G. (7 Aug 2000). "Addition on a Quantum Computer". arXiv:quant-ph/0008033.
Ruiz-Perez, Lidia; Juan Carlos, Garcia-Escartin (2 May 2017). "Quantum arithmetic with the quantum Fourier transform". Quantum Information Processing. 16 (6): 152. arXiv:1411.5949v2. Bibcode:2017QuIP...16..152R. doi:10.1007/s11128-017-1603-1. S2CID 10948948.
Şahin, Engin (2020). "Quantum arithmetic operations based on quantum Fourier transform on signed integers". International Journal of Quantum Information. 18 (6): 2050035. arXiv:2005.00443v3. Bibcode:2020IJQI...1850035S. doi:10.1142/s0219749920500355. ISSN 1793-6918.

books.google.com (Global: 3^rd place; English: 3^rd place)

Singh, Ajay Kumar (2010). "10. Adder and Multiplier Circuits". Digital VLSI Design. Prentice Hall India. pp. 321–344. ISBN 978-81-203-4187-6 – via Google Books.
Lancaster, Geoffrey A. (2004). "10. The Software Developer's View of the Hardware §Half Adders, §Full Adders". Excel HSC Software Design and Development. Pascal Press. p. 180. ISBN 978-1-74125175-3.
Satpathy, Pinaki (2016). "3. Design of Multi-Bit Full Adder using different logic §3.1 4-bit full Adder". Design and Implementation of Carry Select Adder Using T-Spice. Anchor Academic Publishing. p. 22. ISBN 978-3-96067058-2.

doi.org (Global: 2^nd place; English: 2^nd place)

Burgess, Neil (2011). Fast Ripple-Carry Adders in Standard-Cell CMOS VLSI. 20th IEEE Symposium on Computer Arithmetic. pp. 103–111. doi:10.1109/ARITH.2011.23. ISBN 978-1-4244-9457-6.
Brent, Richard Peirce; Kung, Hsiang Te (March 1982). "A Regular Layout for Parallel Adders". IEEE Transactions on Computers. C-31 (3): 260–264. doi:10.1109/TC.1982.1675982. ISSN 0018-9340. S2CID 17348212. Archived from the original on September 24, 2017.
Kogge, Peter Michael; Stone, Harold S. (August 1973). "A Parallel Algorithm for the Efficient Solution of a General Class of Recurrence Equations". IEEE Transactions on Computers. C-22 (8): 786–793. doi:10.1109/TC.1973.5009159. S2CID 206619926.
Reynders, Nele; Dehaene, Wim (2015). Ultra-Low-Voltage Design of Energy-Efficient Digital Circuits. Analog Circuits and Signal Processing. Springer. doi:10.1007/978-3-319-16136-5. ISBN 978-3-319-16135-8. ISSN 1872-082X. LCCN 2015935431.
Zeydel, B.R.; Baran, D.; Oklobdzija, V.G. (June 2010). "Energy Efficient Design of High-Performance VLSI Adders" (PDF). IEEE Journal of Solid-State Circuits. 45 (6): 1220–33. doi:10.1109/JSSC.2010.2048730.
Oklobdzija, V.G.; Villeger, D. (June 1995). "Improving multiplier design by using improved column compression tree and optimized final adder in CMOS technology" (PDF). IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 3 (2): 292–301. doi:10.1109/92.386228.
Feynman, Richard P. (1986). "Quantum mechanical computers". Foundations of Physics. 16 (6). Springer Science and Business Media LLC: 507–531. Bibcode:1986FoPh...16..507F. doi:10.1007/bf01886518. ISSN 0015-9018. S2CID 122076550.
Dibyendu Chatterjee, Arijit Roy (2015). "A transmon-based quantum half-adder scheme". Progress of Theoretical and Experimental Physics. 2015 (9): 093A02. Bibcode:2015PTEP.2015i3A02C. doi:10.1093/ptep/ptv122.
Ruiz-Perez, Lidia; Juan Carlos, Garcia-Escartin (2 May 2017). "Quantum arithmetic with the quantum Fourier transform". Quantum Information Processing. 16 (6): 152. arXiv:1411.5949v2. Bibcode:2017QuIP...16..152R. doi:10.1007/s11128-017-1603-1. S2CID 10948948.
Şahin, Engin (2020). "Quantum arithmetic operations based on quantum Fourier transform on signed integers". International Journal of Quantum Information. 18 (6): 2050035. arXiv:2005.00443v3. Bibcode:2020IJQI...1850035S. doi:10.1142/s0219749920500355. ISSN 1793-6918.

dtic.mil (Global: 934^th place; English: 530^th place)

Brent, Richard Peirce; Kung, Hsiang Te (March 1982). "A Regular Layout for Parallel Adders". IEEE Transactions on Computers. C-31 (3): 260–264. doi:10.1109/TC.1982.1675982. ISSN 0018-9340. S2CID 17348212. Archived from the original on September 24, 2017.

electronics-tutorials.ws (Global: low place; English: low place)

"Summing Amplifier is an Op-amp Voltage Adder". 22 August 2013.

electronicshub.org (Global: low place; English: low place)

Teja, Ravi (2021-04-15), Half Adder and Full Adder Circuits, retrieved 2021-07-27

loc.gov (Global: 63^rd place; English: 47^th place)

lccn.loc.gov

Reynders, Nele; Dehaene, Wim (2015). Ultra-Low-Voltage Design of Energy-Efficient Digital Circuits. Analog Circuits and Signal Processing. Springer. doi:10.1007/978-3-319-16136-5. ISBN 978-3-319-16135-8. ISSN 1872-082X. LCCN 2015935431.

nist.gov (Global: 708^th place; English: 742^nd place)

nvlpubs.nist.gov

Weinberger, A.; Smith, J.L. (1958). "A Logic for High-Speed Addition" (PDF). Nat. Bur. Stand. Circ. (591). National Bureau of Standards: 3–12.

paperity.org (Global: low place; English: low place)

Dibyendu Chatterjee, Arijit Roy (2015). "A transmon-based quantum half-adder scheme". Progress of Theoretical and Experimental Physics. 2015 (9): 093A02. Bibcode:2015PTEP.2015i3A02C. doi:10.1093/ptep/ptv122.

quantum-inspire.com (Global: low place; English: low place)

"Code example: Quantum full adder". QuTech (Delft University of Technology (TU Delft) and the Netherlands Organisation for Applied Scientific Research (TNO)).

semanticscholar.org (Global: 15^th place; English: 8^th place)

api.semanticscholar.org

Brent, Richard Peirce; Kung, Hsiang Te (March 1982). "A Regular Layout for Parallel Adders". IEEE Transactions on Computers. C-31 (3): 260–264. doi:10.1109/TC.1982.1675982. ISSN 0018-9340. S2CID 17348212. Archived from the original on September 24, 2017.
Kogge, Peter Michael; Stone, Harold S. (August 1973). "A Parallel Algorithm for the Efficient Solution of a General Class of Recurrence Equations". IEEE Transactions on Computers. C-22 (8): 786–793. doi:10.1109/TC.1973.5009159. S2CID 206619926.
Feynman, Richard P. (1986). "Quantum mechanical computers". Foundations of Physics. 16 (6). Springer Science and Business Media LLC: 507–531. Bibcode:1986FoPh...16..507F. doi:10.1007/bf01886518. ISSN 0015-9018. S2CID 122076550.
Ruiz-Perez, Lidia; Juan Carlos, Garcia-Escartin (2 May 2017). "Quantum arithmetic with the quantum Fourier transform". Quantum Information Processing. 16 (6): 152. arXiv:1411.5949v2. Bibcode:2017QuIP...16..152R. doi:10.1007/s11128-017-1603-1. S2CID 10948948.

uni-heidelberg.de (Global: 1,287^th place; English: 1,758^th place)

sus.ziti.uni-heidelberg.de

Fischer, P. "Einfache Schaltungsblöcke" (PDF). Universität Heidelberg. Archived from the original (PDF) on 2021-09-05. Retrieved 2021-09-05.

web.archive.org (Global: 1^st place; English: 1^st place)

Fischer, P. "Einfache Schaltungsblöcke" (PDF). Universität Heidelberg. Archived from the original (PDF) on 2021-09-05. Retrieved 2021-09-05.
Brent, Richard Peirce; Kung, Hsiang Te (March 1982). "A Regular Layout for Parallel Adders". IEEE Transactions on Computers. C-31 (3): 260–264. doi:10.1109/TC.1982.1675982. ISSN 0018-9340. S2CID 17348212. Archived from the original on September 24, 2017.

worldcat.org (Global: 4^th place; English: 4^th place)

search.worldcat.org

Mano, M. Morris (1979). Digital Logic and Computer Design. Prentice-Hall. pp. 119–123. ISBN 978-0-13-214510-7. OCLC 1413827071.
Brent, Richard Peirce; Kung, Hsiang Te (March 1982). "A Regular Layout for Parallel Adders". IEEE Transactions on Computers. C-31 (3): 260–264. doi:10.1109/TC.1982.1675982. ISSN 0018-9340. S2CID 17348212. Archived from the original on September 24, 2017.
Reynders, Nele; Dehaene, Wim (2015). Ultra-Low-Voltage Design of Energy-Efficient Digital Circuits. Analog Circuits and Signal Processing. Springer. doi:10.1007/978-3-319-16136-5. ISBN 978-3-319-16135-8. ISSN 1872-082X. LCCN 2015935431.
Feynman, Richard P. (1986). "Quantum mechanical computers". Foundations of Physics. 16 (6). Springer Science and Business Media LLC: 507–531. Bibcode:1986FoPh...16..507F. doi:10.1007/bf01886518. ISSN 0015-9018. S2CID 122076550.
Şahin, Engin (2020). "Quantum arithmetic operations based on quantum Fourier transform on signed integers". International Journal of Quantum Information. 18 (6): 2050035. arXiv:2005.00443v3. Bibcode:2020IJQI...1850035S. doi:10.1142/s0219749920500355. ISSN 1793-6918.

Adder (electronics) (English Wikipedia)

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nvlpubs.nist.gov

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api.semanticscholar.org

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sus.ziti.uni-heidelberg.de

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adsabs.harvard.edu (Global: 14^th place; English: 9^th place)

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nist.gov (Global: 708^th place; English: 742^nd place)

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uni-heidelberg.de (Global: 1,287^th place; English: 1,758^th place)

web.archive.org (Global: 1^st place; English: 1^st place)

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