Analysis of information sources in references of the Wikipedia article "Self-modifying code" in English language version.
The SSEC was the first operating computer capable of treating its own stored instructions exactly like data, modifying them, and acting on the result.
[…] Originally, binary rewriting was motivated by the need to change parts of a program during execution (e.g., run-time patching on the PDP-1 in the 1960's) […](36 pages)
The SSEC was the first operating computer capable of treating its own stored instructions exactly like data, modifying them, and acting on the result.
[…] Originally, binary rewriting was motivated by the need to change parts of a program during execution (e.g., run-time patching on the PDP-1 in the 1960's) […](36 pages)
[…] Originally, binary rewriting was motivated by the need to change parts of a program during execution (e.g., run-time patching on the PDP-1 in the 1960's) […](36 pages)
The SSEC was the first operating computer capable of treating its own stored instructions exactly like data, modifying them, and acting on the result.
[…] Originally, binary rewriting was motivated by the need to change parts of a program during execution (e.g., run-time patching on the PDP-1 in the 1960's) […](36 pages)
[…] Besides fetching an instruction, the Z80 uses half of the cycle to refresh the dynamic RAM. […] since the Z80 must spend half of each instruction fetch cycle performing other chores, it doesn't have as much time to fetch an instruction byte as it does a data byte. If one of the RAM chips at the memory location being accessed is a little slow, the Z80 may get the wrong bit pattern when it fetches an instruction, but get the right one when it reads data. […] the built-in memory test won't catch this type of problem […] it's strictly a data read/write test. During the test, all instruction fetches are from the ROM, not from RAM […] result[ing] in the H89 passing the memory test but still operating erratically on some programs. […] This is a program that tests memory by relocating itself through RAM. As it does so, the CPU prints the current address of the program on the CRT and then fetches the instruction at that address. If the RAM ICs are okay at that address, the CPU relocates the test program to the next memory location, prints the new address, and repeats the procedure. But, if one of the RAM ICs is slow enough to return an incorrect bit pattern, the CPU will misinterpret the instruction and behave unpredictably. However, it's likely that the display will lock up showing the address of faulty IC. This narrows the problem down eight ICs, which is an improvement over having to check as much as 32. […] The […] program will perform a worm test by pushing an RST 7 (RESTART 7) instruction from the low end of memory on up to the last working address. The rest of the program remains stationary and handles the display of the current location of the RST 7 command and its relocation. Incidentally, the program is called a worm test because, as the RST 7 instruction moves up through memory, it leaves behind a slime trail of NOPs (NO OPERATION). […]
The SSEC was the first operating computer capable of treating its own stored instructions exactly like data, modifying them, and acting on the result.
[…] Besides fetching an instruction, the Z80 uses half of the cycle to refresh the dynamic RAM. […] since the Z80 must spend half of each instruction fetch cycle performing other chores, it doesn't have as much time to fetch an instruction byte as it does a data byte. If one of the RAM chips at the memory location being accessed is a little slow, the Z80 may get the wrong bit pattern when it fetches an instruction, but get the right one when it reads data. […] the built-in memory test won't catch this type of problem […] it's strictly a data read/write test. During the test, all instruction fetches are from the ROM, not from RAM […] result[ing] in the H89 passing the memory test but still operating erratically on some programs. […] This is a program that tests memory by relocating itself through RAM. As it does so, the CPU prints the current address of the program on the CRT and then fetches the instruction at that address. If the RAM ICs are okay at that address, the CPU relocates the test program to the next memory location, prints the new address, and repeats the procedure. But, if one of the RAM ICs is slow enough to return an incorrect bit pattern, the CPU will misinterpret the instruction and behave unpredictably. However, it's likely that the display will lock up showing the address of faulty IC. This narrows the problem down eight ICs, which is an improvement over having to check as much as 32. […] The […] program will perform a worm test by pushing an RST 7 (RESTART 7) instruction from the low end of memory on up to the last working address. The rest of the program remains stationary and handles the display of the current location of the RST 7 command and its relocation. Incidentally, the program is called a worm test because, as the RST 7 instruction moves up through memory, it leaves behind a slime trail of NOPs (NO OPERATION). […]
