Krste Asanovic i in., The Landscape of Parallel Computing Research: A View from Berkeley (PDF). University of California, Berkeley. Raport Techniczny numer UCB/EECS-2006-183. 18 grudnia 2006: „Old [conventional wisdom]: Increasing clock frequency is the primary method of improving processor performance. New [conventional wisdom]: Increasing parallelism is the primary method of improving processor performance... Even representatives from Intel, a company generally associated with the 'higher clock-speed is better’ position, warned that traditional approaches to maximizing performance through maximizing clock speed have been pushed to their limit.”.
Gregory V. Wilson: The History of the Development of Parallel Computing. Virginia Tech/Norfolk State University, Interactive Learning with a Digital Library in Computer Science, 1994. [dostęp 2008-01-08]. (ang.).
Andrew B. Kahng, Scoping the Problem of DFM in the Semiconductor Industry, University of California, San Diego, 21 czerwca 2004: „Future design for manufacturing (DFM) technology must reduce design [non-recoverable expenditure] cost and directly address manufacturing [non-recoverable expenditures] – the cost of a mask set and probe card – which is well over $1 million at the 90 nm technology node and creates a significant damper on semiconductor-based innovation.”.
David ED.E.CullerDavid ED.E., Parallel Computer Architecture – A Hardware/Software Approach, Jaswinder PalJ.P.Singh, AnoopA.Gupta, San Francisco: Morgan Kaufmann Publishers, 1999, s. 15, ISBN 1-55860-343-3, OCLC39354251.
